sh: MigoR NAND flash support using gen_flash

Add NAND flash support to the MigoR board by giving board specific data
to the gen_nand platform driver.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 73 insertions, 0 deletions

diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index 44d9b5675ec9..bc7a4cec1277 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -12,6 +12,7 @@
 #include <linux/interrupt.h>
 #include <linux/input.h>
 #include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
 #include <asm/machvec.h>
 #include <asm/io.h>
 #include <asm/sh_keysc.h>
@@ -122,10 +123,77 @@ static struct platform_device migor_nor_flash_device = {
         },
 };
 
+static struct mtd_partition migor_nand_flash_partitions[] = {
+        {
+                .name           = "nanddata1",
+                .offset         = 0x0,
+                .size           = 512 * 1024 * 1024,
+        },
+        {
+                .name           = "nanddata2",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 512 * 1024 * 1024,
+        },
+};
+
+static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
+                                     unsigned int ctrl)
+{
+        struct nand_chip *chip = mtd->priv;
+
+        if (cmd == NAND_CMD_NONE)
+                return;
+
+        if (ctrl & NAND_CLE)
+                writeb(cmd, chip->IO_ADDR_W + 0x00400000);
+        else if (ctrl & NAND_ALE)
+                writeb(cmd, chip->IO_ADDR_W + 0x00800000);
+        else
+                writeb(cmd, chip->IO_ADDR_W);
+}
+
+static int migor_nand_flash_ready(struct mtd_info *mtd)
+{
+        return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */
+}
+
+struct platform_nand_data migor_nand_flash_data = {
+        .chip = {
+                .nr_chips = 1,
+                .partitions = migor_nand_flash_partitions,
+                .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
+                .chip_delay = 20,
+                .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
+        },
+        .ctrl = {
+                .dev_ready = migor_nand_flash_ready,
+                .cmd_ctrl = migor_nand_flash_cmd_ctl,
+        },
+};
+
+static struct resource migor_nand_flash_resources[] = {
+        [0] = {
+                .name           = "NAND Flash",
+                .start          = 0x18000000,
+                .end            = 0x18ffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device migor_nand_flash_device = {
+        .name           = "gen_nand",
+        .resource       = migor_nand_flash_resources,
+        .num_resources  = ARRAY_SIZE(migor_nand_flash_resources),
+        .dev            = {
+                .platform_data = &migor_nand_flash_data,
+        }
+};
+
 static struct platform_device *migor_devices[] __initdata = {
         &smc91x_eth_device,
         &sh_keysc_device,
         &migor_nor_flash_device,
+        &migor_nand_flash_device,
 };
 
 static int __init migor_devices_setup(void)
@@ -146,6 +214,11 @@ static void __init migor_setup(char **cmdline_p)
         ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
         ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
         ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2);
+
+        /* NAND Flash */
+        ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR);
+        ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200,
+                  BSC_CS6ABCR);
 }
 
 static struct sh_machine_vector mv_migor __initmv = {