diff options
author | Richard Curnow <richard.curnow@st.com> | 2006-09-27 01:09:26 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 01:09:26 -0400 |
commit | b638d0b921dc95229af0dfd09cd24850336a2f75 (patch) | |
tree | 0ef34527a47b22421fb92ba2141052fecfe36482 /arch/sh/mm/clear_page.S | |
parent | fdfc74f9fcebdda14609159d5010b758a9409acf (diff) |
sh: Optimized cache handling for SH-4/SH-4A caches.
This reworks some of the SH-4 cache handling code to more easily
accomodate newer-style caches (particularly for the > direct-mapped
case), as well as optimizing some of the old code.
Signed-off-by: Richard Curnow <richard.curnow@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/clear_page.S')
-rw-r--r-- | arch/sh/mm/clear_page.S | 99 |
1 files changed, 1 insertions, 98 deletions
diff --git a/arch/sh/mm/clear_page.S b/arch/sh/mm/clear_page.S index 08acead7b2a1..7b96425ae270 100644 --- a/arch/sh/mm/clear_page.S +++ b/arch/sh/mm/clear_page.S | |||
@@ -193,102 +193,5 @@ ENTRY(__clear_user_page) | |||
193 | nop | 193 | nop |
194 | .L4096: .word 4096 | 194 | .L4096: .word 4096 |
195 | 195 | ||
196 | ENTRY(__flush_cache_4096) | ||
197 | mov.l 1f,r3 | ||
198 | add r6,r3 | ||
199 | mov r4,r0 | ||
200 | mov #64,r2 | ||
201 | shll r2 | ||
202 | mov #64,r6 | ||
203 | jmp @r3 | ||
204 | mov #96,r7 | ||
205 | .align 2 | ||
206 | 1: .long 2f | ||
207 | 2: | ||
208 | .rept 32 | ||
209 | mov.l r5,@r0 | ||
210 | mov.l r5,@(32,r0) | ||
211 | mov.l r5,@(r0,r6) | ||
212 | mov.l r5,@(r0,r7) | ||
213 | add r2,r5 | ||
214 | add r2,r0 | ||
215 | .endr | ||
216 | nop | ||
217 | nop | ||
218 | nop | ||
219 | nop | ||
220 | nop | ||
221 | nop | ||
222 | nop | ||
223 | rts | ||
224 | nop | ||
225 | |||
226 | ENTRY(__flush_dcache_all) | ||
227 | mov.l 2f,r0 | ||
228 | mov.l 3f,r4 | ||
229 | and r0,r4 ! r4 = (unsigned long)&empty_zero_page[0] & ~0xffffc000 | ||
230 | stc sr,r1 ! save SR | ||
231 | mov.l 4f,r2 | ||
232 | or r1,r2 | ||
233 | mov #32,r3 | ||
234 | shll2 r3 | ||
235 | 1: | ||
236 | ldc r2,sr ! set BL bit | ||
237 | movca.l r0,@r4 | ||
238 | ocbi @r4 | ||
239 | add #32,r4 | ||
240 | movca.l r0,@r4 | ||
241 | ocbi @r4 | ||
242 | add #32,r4 | ||
243 | movca.l r0,@r4 | ||
244 | ocbi @r4 | ||
245 | add #32,r4 | ||
246 | movca.l r0,@r4 | ||
247 | ocbi @r4 | ||
248 | ldc r1,sr ! restore SR | ||
249 | dt r3 | ||
250 | bf/s 1b | ||
251 | add #32,r4 | ||
252 | |||
253 | rts | ||
254 | nop | ||
255 | .align 2 | ||
256 | 2: .long 0xffffc000 | ||
257 | 3: .long empty_zero_page | ||
258 | 4: .long 0x10000000 ! BL bit | ||
259 | |||
260 | /* __flush_cache_4096_all(unsigned long addr) */ | ||
261 | ENTRY(__flush_cache_4096_all) | ||
262 | mov.l 2f,r0 | ||
263 | mov.l 3f,r2 | ||
264 | and r0,r2 | ||
265 | or r2,r4 ! r4 = addr | (unsigned long)&empty_zero_page[0] & ~0x3fff | ||
266 | stc sr,r1 ! save SR | ||
267 | mov.l 4f,r2 | ||
268 | or r1,r2 | ||
269 | mov #32,r3 | ||
270 | 1: | ||
271 | ldc r2,sr ! set BL bit | ||
272 | movca.l r0,@r4 | ||
273 | ocbi @r4 | ||
274 | add #32,r4 | ||
275 | movca.l r0,@r4 | ||
276 | ocbi @r4 | ||
277 | add #32,r4 | ||
278 | movca.l r0,@r4 | ||
279 | ocbi @r4 | ||
280 | add #32,r4 | ||
281 | movca.l r0,@r4 | ||
282 | ocbi @r4 | ||
283 | ldc r1,sr ! restore SR | ||
284 | dt r3 | ||
285 | bf/s 1b | ||
286 | add #32,r4 | ||
287 | |||
288 | rts | ||
289 | nop | ||
290 | .align 2 | ||
291 | 2: .long 0xffffc000 | ||
292 | 3: .long empty_zero_page | ||
293 | 4: .long 0x10000000 ! BL bit | ||
294 | #endif | 196 | #endif |
197 | |||