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authorPaul Mundt <lethal@linux-sh.org>2009-10-16 02:14:50 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-10-16 02:14:50 -0400
commitabeaf33a4101764291ec79cf286e08c0966eb26e (patch)
treebb3f8ae60d1ff0d99a907bcc223886f9d71fafea /arch/sh/mm/cache-sh4.c
parent731ba3301de41d2ffae9dd3e0f85f7361d8ad8f4 (diff)
parent52a94909f00e0ffceeac202e517a126d57c1c523 (diff)
Merge branch 'sh/stable-updates'
Conflicts: arch/sh/mm/cache-sh4.c
Diffstat (limited to 'arch/sh/mm/cache-sh4.c')
-rw-r--r--arch/sh/mm/cache-sh4.c26
1 files changed, 12 insertions, 14 deletions
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 56dd55a1b13e..4a2fbf2864de 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -27,7 +27,7 @@
27 */ 27 */
28#define MAX_ICACHE_PAGES 32 28#define MAX_ICACHE_PAGES 32
29 29
30static void __flush_cache_4096(unsigned long addr, unsigned long phys, 30static void __flush_cache_one(unsigned long addr, unsigned long phys,
31 unsigned long exec_offset); 31 unsigned long exec_offset);
32 32
33/* 33/*
@@ -82,8 +82,7 @@ static void __uses_jump_to_uncached sh4_flush_icache_range(void *args)
82 local_irq_restore(flags); 82 local_irq_restore(flags);
83} 83}
84 84
85static inline void flush_cache_4096(unsigned long start, 85static inline void flush_cache_one(unsigned long start, unsigned long phys)
86 unsigned long phys)
87{ 86{
88 unsigned long flags, exec_offset = 0; 87 unsigned long flags, exec_offset = 0;
89 88
@@ -96,8 +95,8 @@ static inline void flush_cache_4096(unsigned long start,
96 exec_offset = cached_to_uncached; 95 exec_offset = cached_to_uncached;
97 96
98 local_irq_save(flags); 97 local_irq_save(flags);
99 __flush_cache_4096(start | SH_CACHE_ASSOC, 98 __flush_cache_one(start | SH_CACHE_ASSOC,
100 virt_to_phys(phys), exec_offset); 99 virt_to_phys(phys), exec_offset);
101 local_irq_restore(flags); 100 local_irq_restore(flags);
102} 101}
103 102
@@ -121,9 +120,9 @@ static void sh4_flush_dcache_page(void *arg)
121 int i, n; 120 int i, n;
122 121
123 /* Loop all the D-cache */ 122 /* Loop all the D-cache */
124 n = boot_cpu_data.dcache.way_incr >> 12; 123 n = boot_cpu_data.dcache.n_aliases;
125 for (i = 0; i < n; i++, addr += 4096) 124 for (i = 0; i <= n; i++, addr += PAGE_SIZE)
126 flush_cache_4096(addr, phys); 125 flush_cache_one(addr, phys);
127 } 126 }
128 127
129 wmb(); 128 wmb();
@@ -220,7 +219,7 @@ static void sh4_flush_cache_page(void *args)
220 void *vaddr; 219 void *vaddr;
221 220
222 vma = data->vma; 221 vma = data->vma;
223 address = data->addr1; 222 address = data->addr1 & PAGE_MASK;
224 pfn = data->addr2; 223 pfn = data->addr2;
225 phys = pfn << PAGE_SHIFT; 224 phys = pfn << PAGE_SHIFT;
226 page = pfn_to_page(pfn); 225 page = pfn_to_page(pfn);
@@ -228,7 +227,6 @@ static void sh4_flush_cache_page(void *args)
228 if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) 227 if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
229 return; 228 return;
230 229
231 address &= PAGE_MASK;
232 pgd = pgd_offset(vma->vm_mm, address); 230 pgd = pgd_offset(vma->vm_mm, address);
233 pud = pud_offset(pgd, address); 231 pud = pud_offset(pgd, address);
234 pmd = pmd_offset(pud, address); 232 pmd = pmd_offset(pud, address);
@@ -257,7 +255,7 @@ static void sh4_flush_cache_page(void *args)
257 } 255 }
258 256
259 if (pages_do_alias(address, phys)) 257 if (pages_do_alias(address, phys))
260 flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 258 flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
261 (address & shm_align_mask), phys); 259 (address & shm_align_mask), phys);
262 260
263 if (vma->vm_flags & VM_EXEC) 261 if (vma->vm_flags & VM_EXEC)
@@ -307,7 +305,7 @@ static void sh4_flush_cache_range(void *args)
307} 305}
308 306
309/** 307/**
310 * __flush_cache_4096 308 * __flush_cache_one
311 * 309 *
312 * @addr: address in memory mapped cache array 310 * @addr: address in memory mapped cache array
313 * @phys: P1 address to flush (has to match tags if addr has 'A' bit 311 * @phys: P1 address to flush (has to match tags if addr has 'A' bit
@@ -320,7 +318,7 @@ static void sh4_flush_cache_range(void *args)
320 * operation (purge/write-back) is selected by the lower 2 bits of 318 * operation (purge/write-back) is selected by the lower 2 bits of
321 * 'phys'. 319 * 'phys'.
322 */ 320 */
323static void __flush_cache_4096(unsigned long addr, unsigned long phys, 321static void __flush_cache_one(unsigned long addr, unsigned long phys,
324 unsigned long exec_offset) 322 unsigned long exec_offset)
325{ 323{
326 int way_count; 324 int way_count;
@@ -357,7 +355,7 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys,
357 * pointless nead-of-loop check for 0 iterations. 355 * pointless nead-of-loop check for 0 iterations.
358 */ 356 */
359 do { 357 do {
360 ea = base_addr + 4096; 358 ea = base_addr + PAGE_SIZE;
361 a = base_addr; 359 a = base_addr;
362 p = phys; 360 p = phys;
363 361