Merge ../linus

Conflicts:

	drivers/cpufreq/cpufreq.c

1 files changed, 83 insertions, 4 deletions

diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 9dd606464d23..29f4ee35c6dc 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -4,8 +4,12 @@ menu "Processor selection"
 # Processor families
 #
 config CPU_SH2
+        select SH_WRITETHROUGH if !CPU_SH2A
         bool
-        select SH_WRITETHROUGH
+
+config CPU_SH2A
+        bool
+        select CPU_SH2
 
 config CPU_SH3
         bool
@@ -16,6 +20,7 @@ config CPU_SH4
         bool
         select CPU_HAS_INTEVT
         select CPU_HAS_SR_RB
+        select CPU_HAS_PTEA if !CPU_SUBTYPE_ST40
 
 config CPU_SH4A
         bool
@@ -30,6 +35,9 @@ config CPU_SUBTYPE_ST40
         select CPU_SH4
         select CPU_HAS_INTC2_IRQ
 
+config CPU_SHX2
+        bool
+
 #
 # Processor subtypes
 #
@@ -40,6 +48,16 @@ config CPU_SUBTYPE_SH7604
         bool "Support SH7604 processor"
         select CPU_SH2
 
+config CPU_SUBTYPE_SH7619
+        bool "Support SH7619 processor"
+        select CPU_SH2
+
+comment "SH-2A Processor Support"
+
+config CPU_SUBTYPE_SH7206
+        bool "Support SH7206 processor"
+        select CPU_SH2A
+
 comment "SH-3 Processor Support"
 
 config CPU_SUBTYPE_SH7300
@@ -89,6 +107,7 @@ comment "SH-4 Processor Support"
 config CPU_SUBTYPE_SH7750
         bool "Support SH7750 processor"
         select CPU_SH4
+        select CPU_HAS_IPR_IRQ
         help
           Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
 
@@ -104,15 +123,18 @@ config CPU_SUBTYPE_SH7750R
         bool "Support SH7750R processor"
         select CPU_SH4
         select CPU_SUBTYPE_SH7750
+        select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7750S
         bool "Support SH7750S processor"
         select CPU_SH4
         select CPU_SUBTYPE_SH7750
+        select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7751
         bool "Support SH7751 processor"
         select CPU_SH4
+        select CPU_HAS_IPR_IRQ
         help
           Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
           or if you have a HD6417751R CPU.
@@ -121,6 +143,7 @@ config CPU_SUBTYPE_SH7751R
         bool "Support SH7751R processor"
         select CPU_SH4
         select CPU_SUBTYPE_SH7751
+        select CPU_HAS_IPR_IRQ
 
 config CPU_SUBTYPE_SH7760
         bool "Support SH7760 processor"
@@ -157,6 +180,12 @@ config CPU_SUBTYPE_SH7780
         select CPU_SH4A
         select CPU_HAS_INTC2_IRQ
 
+config CPU_SUBTYPE_SH7785
+        bool "Support SH7785 processor"
+        select CPU_SH4A
+        select CPU_SHX2
+        select CPU_HAS_INTC2_IRQ
+
 comment "SH4AL-DSP Processor Support"
 
 config CPU_SUBTYPE_SH73180
@@ -167,6 +196,12 @@ config CPU_SUBTYPE_SH7343
         bool "Support SH7343 processor"
         select CPU_SH4AL_DSP
 
+config CPU_SUBTYPE_SH7722
+        bool "Support SH7722 processor"
+        select CPU_SH4AL_DSP
+        select CPU_SHX2
+        select CPU_HAS_IPR_IRQ
+
 endmenu
 
 menu "Memory management options"
@@ -216,13 +251,22 @@ config MEMORY_SIZE
 
 config 32BIT
         bool "Support 32-bit physical addressing through PMB"
-        depends on CPU_SH4A && MMU
+        depends on CPU_SH4A && MMU && (!X2TLB || BROKEN)
         default y
         help
           If you say Y here, physical addressing will be extended to
           32-bits through the SH-4A PMB. If this is not set, legacy
           29-bit physical addressing will be used.
 
+config X2TLB
+        bool "Enable extended TLB mode"
+        depends on CPU_SHX2 && MMU && EXPERIMENTAL
+        help
+          Selecting this option will enable the extended mode of the SH-X2
+          TLB. For legacy SH-X behaviour and interoperability, say N. For
+          all of the fun new features and a willingless to submit bug reports,
+          say Y.
+
 config VSYSCALL
         bool "Support vsyscall page"
         depends on MMU
@@ -237,16 +281,52 @@ config VSYSCALL
           (the default value) say Y.
 
 choice
+        prompt "Kernel page size"
+        default PAGE_SIZE_4KB
+
+config PAGE_SIZE_4KB
+        bool "4kB"
+        help
+          This is the default page size used by all SuperH CPUs.
+
+config PAGE_SIZE_8KB
+        bool "8kB"
+        depends on EXPERIMENTAL && X2TLB
+        help
+          This enables 8kB pages as supported by SH-X2 and later MMUs.
+
+config PAGE_SIZE_64KB
+        bool "64kB"
+        depends on EXPERIMENTAL && CPU_SH4
+        help
+          This enables support for 64kB pages, possible on all SH-4
+          CPUs and later. Highly experimental, not recommended.
+
+endchoice
+
+choice
         prompt "HugeTLB page size"
         depends on HUGETLB_PAGE && CPU_SH4 && MMU
         default HUGETLB_PAGE_SIZE_64K
 
 config HUGETLB_PAGE_SIZE_64K
-        bool "64K"
+        bool "64kB"
+
+config HUGETLB_PAGE_SIZE_256K
+        bool "256kB"
+        depends on X2TLB
 
 config HUGETLB_PAGE_SIZE_1MB
         bool "1MB"
 
+config HUGETLB_PAGE_SIZE_4MB
+        bool "4MB"
+        depends on X2TLB
+
+config HUGETLB_PAGE_SIZE_64MB
+        bool "64MB"
+        depends on X2TLB
+
 endchoice
 
 source "mm/Kconfig"
@@ -274,7 +354,6 @@ config SH_DIRECT_MAPPED
 
 config SH_WRITETHROUGH
         bool "Use write-through caching"
-        default y if CPU_SH2
         help
           Selecting this option will configure the caches in write-through
           mode, as opposed to the default write-back configuration.