diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-06 16:34:45 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-06 16:34:45 -0500 |
commit | 9858a38ea3a940762ae3028cce88f686d0e0c28b (patch) | |
tree | f34a3ba1eba9be58cdd906e33280ce5b35d31b06 /arch/sh/kernel | |
parent | abb359450f20c32ae03039d8736f12b1d561caf5 (diff) | |
parent | f862f904d357dc0d3612347a8dbabe6fae037fbb (diff) |
Merge branch 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: include Migo-R TS driver in Migo-R defconfig
sh: correct definitions to access stack pointers
sh: Tidy up SH-4A unaligned load support.
dma: shdma: NMI support.
sh: mach-sdk7786: Handle baseboard NMI source selection.
sh: mach-rsk: Add polled GPIO buttons support for RSK+7203.
sh: Break out cpuinfo_op procfs bits.
sh: Enable optional gpiolib for all CPUs with pinmux tables.
sh: migrate SH_CLK_MD to mode pin API.
sh: machvec IO death.
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r-- | arch/sh/kernel/Makefile | 6 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/Makefile | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/proc.c | 148 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh2/clock-sh7619.c | 22 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/clock-sh7201.c | 20 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/clock-sh7203.c | 21 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/clock-sh7206.c | 20 | ||||
-rw-r--r-- | arch/sh/kernel/io_generic.c | 180 | ||||
-rw-r--r-- | arch/sh/kernel/iomap.c | 165 | ||||
-rw-r--r-- | arch/sh/kernel/ioport.c | 43 | ||||
-rw-r--r-- | arch/sh/kernel/machvec.c | 22 | ||||
-rw-r--r-- | arch/sh/kernel/setup.c | 144 |
12 files changed, 402 insertions, 391 deletions
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index 8eed6a485446..ff80227b02d8 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile | |||
@@ -20,6 +20,11 @@ obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \ | |||
20 | syscalls_$(BITS).o time.o topology.o traps.o \ | 20 | syscalls_$(BITS).o time.o topology.o traps.o \ |
21 | traps_$(BITS).o unwinder.o | 21 | traps_$(BITS).o unwinder.o |
22 | 22 | ||
23 | ifndef CONFIG_GENERIC_IOMAP | ||
24 | obj-y += iomap.o | ||
25 | obj-$(CONFIG_HAS_IOPORT) += ioport.o | ||
26 | endif | ||
27 | |||
23 | obj-y += cpu/ | 28 | obj-y += cpu/ |
24 | obj-$(CONFIG_VSYSCALL) += vsyscall/ | 29 | obj-$(CONFIG_VSYSCALL) += vsyscall/ |
25 | obj-$(CONFIG_SMP) += smp.o | 30 | obj-$(CONFIG_SMP) += smp.o |
@@ -39,7 +44,6 @@ obj-$(CONFIG_DUMP_CODE) += disassemble.o | |||
39 | obj-$(CONFIG_HIBERNATION) += swsusp.o | 44 | obj-$(CONFIG_HIBERNATION) += swsusp.o |
40 | obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o | 45 | obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o |
41 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o | 46 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o |
42 | obj-$(CONFIG_HAS_IOPORT) += io_generic.o | ||
43 | 47 | ||
44 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o | 48 | obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o |
45 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o | 49 | obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o |
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index 4edcb60a1355..d49c2135fd48 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile | |||
@@ -20,4 +20,4 @@ obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o | |||
20 | obj-$(CONFIG_SH_FPU) += fpu.o | 20 | obj-$(CONFIG_SH_FPU) += fpu.o |
21 | obj-$(CONFIG_SH_FPU_EMU) += fpu.o | 21 | obj-$(CONFIG_SH_FPU_EMU) += fpu.o |
22 | 22 | ||
23 | obj-y += irq/ init.o clock.o hwblk.o | 23 | obj-y += irq/ init.o clock.o hwblk.o proc.o |
diff --git a/arch/sh/kernel/cpu/proc.c b/arch/sh/kernel/cpu/proc.c new file mode 100644 index 000000000000..e80a936f409a --- /dev/null +++ b/arch/sh/kernel/cpu/proc.c | |||
@@ -0,0 +1,148 @@ | |||
1 | #include <linux/seq_file.h> | ||
2 | #include <linux/kernel.h> | ||
3 | #include <linux/module.h> | ||
4 | #include <asm/machvec.h> | ||
5 | #include <asm/processor.h> | ||
6 | |||
7 | static const char *cpu_name[] = { | ||
8 | [CPU_SH7201] = "SH7201", | ||
9 | [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", | ||
10 | [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", | ||
11 | [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", | ||
12 | [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", | ||
13 | [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", | ||
14 | [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", | ||
15 | [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729", | ||
16 | [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", | ||
17 | [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", | ||
18 | [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760", | ||
19 | [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", | ||
20 | [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", | ||
21 | [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", | ||
22 | [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", | ||
23 | [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757", | ||
24 | [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", | ||
25 | [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", | ||
26 | [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", | ||
27 | [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", | ||
28 | [CPU_SH_NONE] = "Unknown" | ||
29 | }; | ||
30 | |||
31 | const char *get_cpu_subtype(struct sh_cpuinfo *c) | ||
32 | { | ||
33 | return cpu_name[c->type]; | ||
34 | } | ||
35 | EXPORT_SYMBOL(get_cpu_subtype); | ||
36 | |||
37 | #ifdef CONFIG_PROC_FS | ||
38 | /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ | ||
39 | static const char *cpu_flags[] = { | ||
40 | "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", | ||
41 | "ptea", "llsc", "l2", "op32", "pteaex", NULL | ||
42 | }; | ||
43 | |||
44 | static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) | ||
45 | { | ||
46 | unsigned long i; | ||
47 | |||
48 | seq_printf(m, "cpu flags\t:"); | ||
49 | |||
50 | if (!c->flags) { | ||
51 | seq_printf(m, " %s\n", cpu_flags[0]); | ||
52 | return; | ||
53 | } | ||
54 | |||
55 | for (i = 0; cpu_flags[i]; i++) | ||
56 | if ((c->flags & (1 << i))) | ||
57 | seq_printf(m, " %s", cpu_flags[i+1]); | ||
58 | |||
59 | seq_printf(m, "\n"); | ||
60 | } | ||
61 | |||
62 | static void show_cacheinfo(struct seq_file *m, const char *type, | ||
63 | struct cache_info info) | ||
64 | { | ||
65 | unsigned int cache_size; | ||
66 | |||
67 | cache_size = info.ways * info.sets * info.linesz; | ||
68 | |||
69 | seq_printf(m, "%s size\t: %2dKiB (%d-way)\n", | ||
70 | type, cache_size >> 10, info.ways); | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * Get CPU information for use by the procfs. | ||
75 | */ | ||
76 | static int show_cpuinfo(struct seq_file *m, void *v) | ||
77 | { | ||
78 | struct sh_cpuinfo *c = v; | ||
79 | unsigned int cpu = c - cpu_data; | ||
80 | |||
81 | if (!cpu_online(cpu)) | ||
82 | return 0; | ||
83 | |||
84 | if (cpu == 0) | ||
85 | seq_printf(m, "machine\t\t: %s\n", get_system_type()); | ||
86 | else | ||
87 | seq_printf(m, "\n"); | ||
88 | |||
89 | seq_printf(m, "processor\t: %d\n", cpu); | ||
90 | seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); | ||
91 | seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); | ||
92 | if (c->cut_major == -1) | ||
93 | seq_printf(m, "cut\t\t: unknown\n"); | ||
94 | else if (c->cut_minor == -1) | ||
95 | seq_printf(m, "cut\t\t: %d.x\n", c->cut_major); | ||
96 | else | ||
97 | seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor); | ||
98 | |||
99 | show_cpuflags(m, c); | ||
100 | |||
101 | seq_printf(m, "cache type\t: "); | ||
102 | |||
103 | /* | ||
104 | * Check for what type of cache we have, we support both the | ||
105 | * unified cache on the SH-2 and SH-3, as well as the harvard | ||
106 | * style cache on the SH-4. | ||
107 | */ | ||
108 | if (c->icache.flags & SH_CACHE_COMBINED) { | ||
109 | seq_printf(m, "unified\n"); | ||
110 | show_cacheinfo(m, "cache", c->icache); | ||
111 | } else { | ||
112 | seq_printf(m, "split (harvard)\n"); | ||
113 | show_cacheinfo(m, "icache", c->icache); | ||
114 | show_cacheinfo(m, "dcache", c->dcache); | ||
115 | } | ||
116 | |||
117 | /* Optional secondary cache */ | ||
118 | if (c->flags & CPU_HAS_L2_CACHE) | ||
119 | show_cacheinfo(m, "scache", c->scache); | ||
120 | |||
121 | seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits); | ||
122 | |||
123 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | ||
124 | c->loops_per_jiffy/(500000/HZ), | ||
125 | (c->loops_per_jiffy/(5000/HZ)) % 100); | ||
126 | |||
127 | return 0; | ||
128 | } | ||
129 | |||
130 | static void *c_start(struct seq_file *m, loff_t *pos) | ||
131 | { | ||
132 | return *pos < NR_CPUS ? cpu_data + *pos : NULL; | ||
133 | } | ||
134 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | ||
135 | { | ||
136 | ++*pos; | ||
137 | return c_start(m, pos); | ||
138 | } | ||
139 | static void c_stop(struct seq_file *m, void *v) | ||
140 | { | ||
141 | } | ||
142 | const struct seq_operations cpuinfo_op = { | ||
143 | .start = c_start, | ||
144 | .next = c_next, | ||
145 | .stop = c_stop, | ||
146 | .show = show_cpuinfo, | ||
147 | }; | ||
148 | #endif /* CONFIG_PROC_FS */ | ||
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c index 0c9f24d7a02f..5b7f12e58a8d 100644 --- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c +++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c | |||
@@ -14,24 +14,18 @@ | |||
14 | */ | 14 | */ |
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <linux/io.h> | ||
17 | #include <asm/clock.h> | 18 | #include <asm/clock.h> |
18 | #include <asm/freq.h> | 19 | #include <asm/freq.h> |
19 | #include <asm/io.h> | 20 | #include <asm/processor.h> |
20 | 21 | ||
21 | static const int pll1rate[] = {1,2}; | 22 | static const int pll1rate[] = {1,2}; |
22 | static const int pfc_divisors[] = {1,2,0,4}; | 23 | static const int pfc_divisors[] = {1,2,0,4}; |
23 | 24 | static unsigned int pll2_mult; | |
24 | #if (CONFIG_SH_CLK_MD == 1) || (CONFIG_SH_CLK_MD == 2) | ||
25 | #define PLL2 (4) | ||
26 | #elif (CONFIG_SH_CLK_MD == 5) || (CONFIG_SH_CLK_MD == 6) | ||
27 | #define PLL2 (2) | ||
28 | #else | ||
29 | #error "Illigal Clock Mode!" | ||
30 | #endif | ||
31 | 25 | ||
32 | static void master_clk_init(struct clk *clk) | 26 | static void master_clk_init(struct clk *clk) |
33 | { | 27 | { |
34 | clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; | 28 | clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; |
35 | } | 29 | } |
36 | 30 | ||
37 | static struct clk_ops sh7619_master_clk_ops = { | 31 | static struct clk_ops sh7619_master_clk_ops = { |
@@ -70,6 +64,14 @@ static struct clk_ops *sh7619_clk_ops[] = { | |||
70 | 64 | ||
71 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | 65 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) |
72 | { | 66 | { |
67 | if (test_mode_pin(MODE_PIN2 | MODE_PIN0) || | ||
68 | test_mode_pin(MODE_PIN2 | MODE_PIN1)) | ||
69 | pll2_mult = 2; | ||
70 | else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1)) | ||
71 | pll2_mult = 4; | ||
72 | |||
73 | BUG_ON(!pll2_mult); | ||
74 | |||
73 | if (idx < ARRAY_SIZE(sh7619_clk_ops)) | 75 | if (idx < ARRAY_SIZE(sh7619_clk_ops)) |
74 | *ops = sh7619_clk_ops[idx]; | 76 | *ops = sh7619_clk_ops[idx]; |
75 | } | 77 | } |
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c index c509c40cba4b..1174e2d96c03 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c | |||
@@ -22,19 +22,12 @@ static const int pll1rate[]={1,2,3,4,6,8}; | |||
22 | static const int pfc_divisors[]={1,2,3,4,6,8,12}; | 22 | static const int pfc_divisors[]={1,2,3,4,6,8,12}; |
23 | #define ifc_divisors pfc_divisors | 23 | #define ifc_divisors pfc_divisors |
24 | 24 | ||
25 | #if (CONFIG_SH_CLK_MD == 0) | 25 | static unsigned int pll2_mult; |
26 | #define PLL2 (4) | ||
27 | #elif (CONFIG_SH_CLK_MD == 2) | ||
28 | #define PLL2 (2) | ||
29 | #elif (CONFIG_SH_CLK_MD == 3) | ||
30 | #define PLL2 (1) | ||
31 | #else | ||
32 | #error "Illegal Clock Mode!" | ||
33 | #endif | ||
34 | 26 | ||
35 | static void master_clk_init(struct clk *clk) | 27 | static void master_clk_init(struct clk *clk) |
36 | { | 28 | { |
37 | clk->rate = 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; | 29 | clk->rate = 10000000 * pll2_mult * |
30 | pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; | ||
38 | } | 31 | } |
39 | 32 | ||
40 | static struct clk_ops sh7201_master_clk_ops = { | 33 | static struct clk_ops sh7201_master_clk_ops = { |
@@ -80,6 +73,13 @@ static struct clk_ops *sh7201_clk_ops[] = { | |||
80 | 73 | ||
81 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | 74 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) |
82 | { | 75 | { |
76 | if (test_mode_pin(MODE_PIN1 | MODE_PIN0)) | ||
77 | pll2_mult = 1; | ||
78 | else if (test_mode_pin(MODE_PIN1)) | ||
79 | pll2_mult = 2; | ||
80 | else | ||
81 | pll2_mult = 4; | ||
82 | |||
83 | if (idx < ARRAY_SIZE(sh7201_clk_ops)) | 83 | if (idx < ARRAY_SIZE(sh7201_clk_ops)) |
84 | *ops = sh7201_clk_ops[idx]; | 84 | *ops = sh7201_clk_ops[idx]; |
85 | } | 85 | } |
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c index 7e75d8f79502..95a008e8b735 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c | |||
@@ -25,21 +25,11 @@ static const int pll1rate[]={8,12,16,0}; | |||
25 | static const int pfc_divisors[]={1,2,3,4,6,8,12}; | 25 | static const int pfc_divisors[]={1,2,3,4,6,8,12}; |
26 | #define ifc_divisors pfc_divisors | 26 | #define ifc_divisors pfc_divisors |
27 | 27 | ||
28 | #if (CONFIG_SH_CLK_MD == 0) | 28 | static unsigned int pll2_mult; |
29 | #define PLL2 (1) | ||
30 | #elif (CONFIG_SH_CLK_MD == 1) | ||
31 | #define PLL2 (2) | ||
32 | #elif (CONFIG_SH_CLK_MD == 2) | ||
33 | #define PLL2 (4) | ||
34 | #elif (CONFIG_SH_CLK_MD == 3) | ||
35 | #define PLL2 (4) | ||
36 | #else | ||
37 | #error "Illegal Clock Mode!" | ||
38 | #endif | ||
39 | 29 | ||
40 | static void master_clk_init(struct clk *clk) | 30 | static void master_clk_init(struct clk *clk) |
41 | { | 31 | { |
42 | clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ; | 32 | clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; |
43 | } | 33 | } |
44 | 34 | ||
45 | static struct clk_ops sh7203_master_clk_ops = { | 35 | static struct clk_ops sh7203_master_clk_ops = { |
@@ -79,6 +69,13 @@ static struct clk_ops *sh7203_clk_ops[] = { | |||
79 | 69 | ||
80 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | 70 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) |
81 | { | 71 | { |
72 | if (test_mode_pin(MODE_PIN1)) | ||
73 | pll2_mult = 4; | ||
74 | else if (test_mode_pin(MODE_PIN0)) | ||
75 | pll2_mult = 2; | ||
76 | else | ||
77 | pll2_mult = 1; | ||
78 | |||
82 | if (idx < ARRAY_SIZE(sh7203_clk_ops)) | 79 | if (idx < ARRAY_SIZE(sh7203_clk_ops)) |
83 | *ops = sh7203_clk_ops[idx]; | 80 | *ops = sh7203_clk_ops[idx]; |
84 | } | 81 | } |
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c index b27a5e2687ab..3c314d7cd6e6 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c | |||
@@ -22,19 +22,11 @@ static const int pll1rate[]={1,2,3,4,6,8}; | |||
22 | static const int pfc_divisors[]={1,2,3,4,6,8,12}; | 22 | static const int pfc_divisors[]={1,2,3,4,6,8,12}; |
23 | #define ifc_divisors pfc_divisors | 23 | #define ifc_divisors pfc_divisors |
24 | 24 | ||
25 | #if (CONFIG_SH_CLK_MD == 2) | 25 | static unsigned int pll2_mult; |
26 | #define PLL2 (4) | ||
27 | #elif (CONFIG_SH_CLK_MD == 6) | ||
28 | #define PLL2 (2) | ||
29 | #elif (CONFIG_SH_CLK_MD == 7) | ||
30 | #define PLL2 (1) | ||
31 | #else | ||
32 | #error "Illigal Clock Mode!" | ||
33 | #endif | ||
34 | 26 | ||
35 | static void master_clk_init(struct clk *clk) | 27 | static void master_clk_init(struct clk *clk) |
36 | { | 28 | { |
37 | clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; | 29 | clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; |
38 | } | 30 | } |
39 | 31 | ||
40 | static struct clk_ops sh7206_master_clk_ops = { | 32 | static struct clk_ops sh7206_master_clk_ops = { |
@@ -79,7 +71,13 @@ static struct clk_ops *sh7206_clk_ops[] = { | |||
79 | 71 | ||
80 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) | 72 | void __init arch_init_clk_ops(struct clk_ops **ops, int idx) |
81 | { | 73 | { |
74 | if (test_mode_pin(MODE_PIN2 | MODE_PIN1 | MODE_PIN0)) | ||
75 | pll2_mult = 1; | ||
76 | else if (test_mode_pin(MODE_PIN2 | MODE_PIN1)) | ||
77 | pll2_mult = 2; | ||
78 | else if (test_mode_pin(MODE_PIN1)) | ||
79 | pll2_mult = 4; | ||
80 | |||
82 | if (idx < ARRAY_SIZE(sh7206_clk_ops)) | 81 | if (idx < ARRAY_SIZE(sh7206_clk_ops)) |
83 | *ops = sh7206_clk_ops[idx]; | 82 | *ops = sh7206_clk_ops[idx]; |
84 | } | 83 | } |
85 | |||
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c deleted file mode 100644 index 447d78f666f9..000000000000 --- a/arch/sh/kernel/io_generic.c +++ /dev/null | |||
@@ -1,180 +0,0 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/io_generic.c | ||
3 | * | ||
4 | * Copyright (C) 2000 Niibe Yutaka | ||
5 | * Copyright (C) 2005 - 2007 Paul Mundt | ||
6 | * | ||
7 | * Generic I/O routine. These can be used where a machine specific version | ||
8 | * is not required. | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | */ | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <asm/machvec.h> | ||
17 | |||
18 | #ifdef CONFIG_CPU_SH3 | ||
19 | /* SH3 has a PCMCIA bug that needs a dummy read from area 6 for a | ||
20 | * workaround. */ | ||
21 | /* I'm not sure SH7709 has this kind of bug */ | ||
22 | #define dummy_read() __raw_readb(0xba000000) | ||
23 | #else | ||
24 | #define dummy_read() | ||
25 | #endif | ||
26 | |||
27 | unsigned long generic_io_base = 0; | ||
28 | |||
29 | u8 generic_inb(unsigned long port) | ||
30 | { | ||
31 | return __raw_readb(__ioport_map(port, 1)); | ||
32 | } | ||
33 | |||
34 | u16 generic_inw(unsigned long port) | ||
35 | { | ||
36 | return __raw_readw(__ioport_map(port, 2)); | ||
37 | } | ||
38 | |||
39 | u32 generic_inl(unsigned long port) | ||
40 | { | ||
41 | return __raw_readl(__ioport_map(port, 4)); | ||
42 | } | ||
43 | |||
44 | u8 generic_inb_p(unsigned long port) | ||
45 | { | ||
46 | unsigned long v = generic_inb(port); | ||
47 | |||
48 | ctrl_delay(); | ||
49 | return v; | ||
50 | } | ||
51 | |||
52 | u16 generic_inw_p(unsigned long port) | ||
53 | { | ||
54 | unsigned long v = generic_inw(port); | ||
55 | |||
56 | ctrl_delay(); | ||
57 | return v; | ||
58 | } | ||
59 | |||
60 | u32 generic_inl_p(unsigned long port) | ||
61 | { | ||
62 | unsigned long v = generic_inl(port); | ||
63 | |||
64 | ctrl_delay(); | ||
65 | return v; | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * insb/w/l all read a series of bytes/words/longs from a fixed port | ||
70 | * address. However as the port address doesn't change we only need to | ||
71 | * convert the port address to real address once. | ||
72 | */ | ||
73 | |||
74 | void generic_insb(unsigned long port, void *dst, unsigned long count) | ||
75 | { | ||
76 | __raw_readsb(__ioport_map(port, 1), dst, count); | ||
77 | dummy_read(); | ||
78 | } | ||
79 | |||
80 | void generic_insw(unsigned long port, void *dst, unsigned long count) | ||
81 | { | ||
82 | __raw_readsw(__ioport_map(port, 2), dst, count); | ||
83 | dummy_read(); | ||
84 | } | ||
85 | |||
86 | void generic_insl(unsigned long port, void *dst, unsigned long count) | ||
87 | { | ||
88 | __raw_readsl(__ioport_map(port, 4), dst, count); | ||
89 | dummy_read(); | ||
90 | } | ||
91 | |||
92 | void generic_outb(u8 b, unsigned long port) | ||
93 | { | ||
94 | __raw_writeb(b, __ioport_map(port, 1)); | ||
95 | } | ||
96 | |||
97 | void generic_outw(u16 b, unsigned long port) | ||
98 | { | ||
99 | __raw_writew(b, __ioport_map(port, 2)); | ||
100 | } | ||
101 | |||
102 | void generic_outl(u32 b, unsigned long port) | ||
103 | { | ||
104 | __raw_writel(b, __ioport_map(port, 4)); | ||
105 | } | ||
106 | |||
107 | void generic_outb_p(u8 b, unsigned long port) | ||
108 | { | ||
109 | generic_outb(b, port); | ||
110 | ctrl_delay(); | ||
111 | } | ||
112 | |||
113 | void generic_outw_p(u16 b, unsigned long port) | ||
114 | { | ||
115 | generic_outw(b, port); | ||
116 | ctrl_delay(); | ||
117 | } | ||
118 | |||
119 | void generic_outl_p(u32 b, unsigned long port) | ||
120 | { | ||
121 | generic_outl(b, port); | ||
122 | ctrl_delay(); | ||
123 | } | ||
124 | |||
125 | /* | ||
126 | * outsb/w/l all write a series of bytes/words/longs to a fixed port | ||
127 | * address. However as the port address doesn't change we only need to | ||
128 | * convert the port address to real address once. | ||
129 | */ | ||
130 | void generic_outsb(unsigned long port, const void *src, unsigned long count) | ||
131 | { | ||
132 | __raw_writesb(__ioport_map(port, 1), src, count); | ||
133 | dummy_read(); | ||
134 | } | ||
135 | |||
136 | void generic_outsw(unsigned long port, const void *src, unsigned long count) | ||
137 | { | ||
138 | __raw_writesw(__ioport_map(port, 2), src, count); | ||
139 | dummy_read(); | ||
140 | } | ||
141 | |||
142 | void generic_outsl(unsigned long port, const void *src, unsigned long count) | ||
143 | { | ||
144 | __raw_writesl(__ioport_map(port, 4), src, count); | ||
145 | dummy_read(); | ||
146 | } | ||
147 | |||
148 | void __iomem *generic_ioport_map(unsigned long addr, unsigned int size) | ||
149 | { | ||
150 | #ifdef P1SEG | ||
151 | if (PXSEG(addr) >= P1SEG) | ||
152 | return (void __iomem *)addr; | ||
153 | #endif | ||
154 | |||
155 | return (void __iomem *)(addr + generic_io_base); | ||
156 | } | ||
157 | |||
158 | void generic_ioport_unmap(void __iomem *addr) | ||
159 | { | ||
160 | } | ||
161 | |||
162 | #ifndef CONFIG_GENERIC_IOMAP | ||
163 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
164 | { | ||
165 | void __iomem *ret; | ||
166 | |||
167 | ret = __ioport_map_trapped(port, nr); | ||
168 | if (ret) | ||
169 | return ret; | ||
170 | |||
171 | return __ioport_map(port, nr); | ||
172 | } | ||
173 | EXPORT_SYMBOL(ioport_map); | ||
174 | |||
175 | void ioport_unmap(void __iomem *addr) | ||
176 | { | ||
177 | sh_mv.mv_ioport_unmap(addr); | ||
178 | } | ||
179 | EXPORT_SYMBOL(ioport_unmap); | ||
180 | #endif /* CONFIG_GENERIC_IOMAP */ | ||
diff --git a/arch/sh/kernel/iomap.c b/arch/sh/kernel/iomap.c new file mode 100644 index 000000000000..2e8e8b9b9cef --- /dev/null +++ b/arch/sh/kernel/iomap.c | |||
@@ -0,0 +1,165 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/iomap.c | ||
3 | * | ||
4 | * Copyright (C) 2000 Niibe Yutaka | ||
5 | * Copyright (C) 2005 - 2007 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/io.h> | ||
13 | |||
14 | unsigned int ioread8(void __iomem *addr) | ||
15 | { | ||
16 | return readb(addr); | ||
17 | } | ||
18 | EXPORT_SYMBOL(ioread8); | ||
19 | |||
20 | unsigned int ioread16(void __iomem *addr) | ||
21 | { | ||
22 | return readw(addr); | ||
23 | } | ||
24 | EXPORT_SYMBOL(ioread16); | ||
25 | |||
26 | unsigned int ioread16be(void __iomem *addr) | ||
27 | { | ||
28 | return be16_to_cpu(__raw_readw(addr)); | ||
29 | } | ||
30 | EXPORT_SYMBOL(ioread16be); | ||
31 | |||
32 | unsigned int ioread32(void __iomem *addr) | ||
33 | { | ||
34 | return readl(addr); | ||
35 | } | ||
36 | EXPORT_SYMBOL(ioread32); | ||
37 | |||
38 | unsigned int ioread32be(void __iomem *addr) | ||
39 | { | ||
40 | return be32_to_cpu(__raw_readl(addr)); | ||
41 | } | ||
42 | EXPORT_SYMBOL(ioread32be); | ||
43 | |||
44 | void iowrite8(u8 val, void __iomem *addr) | ||
45 | { | ||
46 | writeb(val, addr); | ||
47 | } | ||
48 | EXPORT_SYMBOL(iowrite8); | ||
49 | |||
50 | void iowrite16(u16 val, void __iomem *addr) | ||
51 | { | ||
52 | writew(val, addr); | ||
53 | } | ||
54 | EXPORT_SYMBOL(iowrite16); | ||
55 | |||
56 | void iowrite16be(u16 val, void __iomem *addr) | ||
57 | { | ||
58 | __raw_writew(cpu_to_be16(val), addr); | ||
59 | } | ||
60 | EXPORT_SYMBOL(iowrite16be); | ||
61 | |||
62 | void iowrite32(u32 val, void __iomem *addr) | ||
63 | { | ||
64 | writel(val, addr); | ||
65 | } | ||
66 | EXPORT_SYMBOL(iowrite32); | ||
67 | |||
68 | void iowrite32be(u32 val, void __iomem *addr) | ||
69 | { | ||
70 | __raw_writel(cpu_to_be32(val), addr); | ||
71 | } | ||
72 | EXPORT_SYMBOL(iowrite32be); | ||
73 | |||
74 | /* | ||
75 | * These are the "repeat MMIO read/write" functions. | ||
76 | * Note the "__raw" accesses, since we don't want to | ||
77 | * convert to CPU byte order. We write in "IO byte | ||
78 | * order" (we also don't have IO barriers). | ||
79 | */ | ||
80 | static inline void mmio_insb(void __iomem *addr, u8 *dst, int count) | ||
81 | { | ||
82 | while (--count >= 0) { | ||
83 | u8 data = __raw_readb(addr); | ||
84 | *dst = data; | ||
85 | dst++; | ||
86 | } | ||
87 | } | ||
88 | |||
89 | static inline void mmio_insw(void __iomem *addr, u16 *dst, int count) | ||
90 | { | ||
91 | while (--count >= 0) { | ||
92 | u16 data = __raw_readw(addr); | ||
93 | *dst = data; | ||
94 | dst++; | ||
95 | } | ||
96 | } | ||
97 | |||
98 | static inline void mmio_insl(void __iomem *addr, u32 *dst, int count) | ||
99 | { | ||
100 | while (--count >= 0) { | ||
101 | u32 data = __raw_readl(addr); | ||
102 | *dst = data; | ||
103 | dst++; | ||
104 | } | ||
105 | } | ||
106 | |||
107 | static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count) | ||
108 | { | ||
109 | while (--count >= 0) { | ||
110 | __raw_writeb(*src, addr); | ||
111 | src++; | ||
112 | } | ||
113 | } | ||
114 | |||
115 | static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count) | ||
116 | { | ||
117 | while (--count >= 0) { | ||
118 | __raw_writew(*src, addr); | ||
119 | src++; | ||
120 | } | ||
121 | } | ||
122 | |||
123 | static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count) | ||
124 | { | ||
125 | while (--count >= 0) { | ||
126 | __raw_writel(*src, addr); | ||
127 | src++; | ||
128 | } | ||
129 | } | ||
130 | |||
131 | void ioread8_rep(void __iomem *addr, void *dst, unsigned long count) | ||
132 | { | ||
133 | mmio_insb(addr, dst, count); | ||
134 | } | ||
135 | EXPORT_SYMBOL(ioread8_rep); | ||
136 | |||
137 | void ioread16_rep(void __iomem *addr, void *dst, unsigned long count) | ||
138 | { | ||
139 | mmio_insw(addr, dst, count); | ||
140 | } | ||
141 | EXPORT_SYMBOL(ioread16_rep); | ||
142 | |||
143 | void ioread32_rep(void __iomem *addr, void *dst, unsigned long count) | ||
144 | { | ||
145 | mmio_insl(addr, dst, count); | ||
146 | } | ||
147 | EXPORT_SYMBOL(ioread32_rep); | ||
148 | |||
149 | void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count) | ||
150 | { | ||
151 | mmio_outsb(addr, src, count); | ||
152 | } | ||
153 | EXPORT_SYMBOL(iowrite8_rep); | ||
154 | |||
155 | void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count) | ||
156 | { | ||
157 | mmio_outsw(addr, src, count); | ||
158 | } | ||
159 | EXPORT_SYMBOL(iowrite16_rep); | ||
160 | |||
161 | void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) | ||
162 | { | ||
163 | mmio_outsl(addr, src, count); | ||
164 | } | ||
165 | EXPORT_SYMBOL(iowrite32_rep); | ||
diff --git a/arch/sh/kernel/ioport.c b/arch/sh/kernel/ioport.c new file mode 100644 index 000000000000..e3ad6103e7c1 --- /dev/null +++ b/arch/sh/kernel/ioport.c | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/ioport.c | ||
3 | * | ||
4 | * Copyright (C) 2000 Niibe Yutaka | ||
5 | * Copyright (C) 2005 - 2007 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/io.h> | ||
13 | |||
14 | const unsigned long sh_io_port_base __read_mostly = -1; | ||
15 | EXPORT_SYMBOL(sh_io_port_base); | ||
16 | |||
17 | void __iomem *__ioport_map(unsigned long addr, unsigned int size) | ||
18 | { | ||
19 | if (sh_mv.mv_ioport_map) | ||
20 | return sh_mv.mv_ioport_map(addr, size); | ||
21 | |||
22 | return (void __iomem *)(addr + sh_io_port_base); | ||
23 | } | ||
24 | EXPORT_SYMBOL(__ioport_map); | ||
25 | |||
26 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
27 | { | ||
28 | void __iomem *ret; | ||
29 | |||
30 | ret = __ioport_map_trapped(port, nr); | ||
31 | if (ret) | ||
32 | return ret; | ||
33 | |||
34 | return __ioport_map(port, nr); | ||
35 | } | ||
36 | EXPORT_SYMBOL(ioport_map); | ||
37 | |||
38 | void ioport_unmap(void __iomem *addr) | ||
39 | { | ||
40 | if (sh_mv.mv_ioport_unmap) | ||
41 | sh_mv.mv_ioport_unmap(addr); | ||
42 | } | ||
43 | EXPORT_SYMBOL(ioport_unmap); | ||
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c index 9f9bb63616ad..3d722e49db08 100644 --- a/arch/sh/kernel/machvec.c +++ b/arch/sh/kernel/machvec.c | |||
@@ -118,28 +118,6 @@ void __init sh_mv_setup(void) | |||
118 | sh_mv.mv_##elem = generic_##elem; \ | 118 | sh_mv.mv_##elem = generic_##elem; \ |
119 | } while (0) | 119 | } while (0) |
120 | 120 | ||
121 | #ifdef CONFIG_HAS_IOPORT | ||
122 | |||
123 | #ifdef P2SEG | ||
124 | __set_io_port_base(P2SEG); | ||
125 | #else | ||
126 | __set_io_port_base(0); | ||
127 | #endif | ||
128 | |||
129 | mv_set(inb); mv_set(inw); mv_set(inl); | ||
130 | mv_set(outb); mv_set(outw); mv_set(outl); | ||
131 | |||
132 | mv_set(inb_p); mv_set(inw_p); mv_set(inl_p); | ||
133 | mv_set(outb_p); mv_set(outw_p); mv_set(outl_p); | ||
134 | |||
135 | mv_set(insb); mv_set(insw); mv_set(insl); | ||
136 | mv_set(outsb); mv_set(outsw); mv_set(outsl); | ||
137 | |||
138 | mv_set(ioport_map); | ||
139 | mv_set(ioport_unmap); | ||
140 | |||
141 | #endif | ||
142 | |||
143 | mv_set(irq_demux); | 121 | mv_set(irq_demux); |
144 | mv_set(mode_pins); | 122 | mv_set(mode_pins); |
145 | mv_set(mem_init); | 123 | mv_set(mem_init); |
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index d6b018c7ebdc..4f267160c515 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
@@ -12,7 +12,6 @@ | |||
12 | #include <linux/initrd.h> | 12 | #include <linux/initrd.h> |
13 | #include <linux/bootmem.h> | 13 | #include <linux/bootmem.h> |
14 | #include <linux/console.h> | 14 | #include <linux/console.h> |
15 | #include <linux/seq_file.h> | ||
16 | #include <linux/root_dev.h> | 15 | #include <linux/root_dev.h> |
17 | #include <linux/utsname.h> | 16 | #include <linux/utsname.h> |
18 | #include <linux/nodemask.h> | 17 | #include <linux/nodemask.h> |
@@ -319,146 +318,3 @@ int test_mode_pin(int pin) | |||
319 | { | 318 | { |
320 | return sh_mv.mv_mode_pins() & pin; | 319 | return sh_mv.mv_mode_pins() & pin; |
321 | } | 320 | } |
322 | |||
323 | static const char *cpu_name[] = { | ||
324 | [CPU_SH7201] = "SH7201", | ||
325 | [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263", | ||
326 | [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", | ||
327 | [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", | ||
328 | [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", | ||
329 | [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", | ||
330 | [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", | ||
331 | [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729", | ||
332 | [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", | ||
333 | [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751", | ||
334 | [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760", | ||
335 | [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", | ||
336 | [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770", | ||
337 | [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781", | ||
338 | [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", | ||
339 | [CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757", | ||
340 | [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", | ||
341 | [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", | ||
342 | [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", | ||
343 | [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", | ||
344 | [CPU_SH_NONE] = "Unknown" | ||
345 | }; | ||
346 | |||
347 | const char *get_cpu_subtype(struct sh_cpuinfo *c) | ||
348 | { | ||
349 | return cpu_name[c->type]; | ||
350 | } | ||
351 | EXPORT_SYMBOL(get_cpu_subtype); | ||
352 | |||
353 | #ifdef CONFIG_PROC_FS | ||
354 | /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ | ||
355 | static const char *cpu_flags[] = { | ||
356 | "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr", | ||
357 | "ptea", "llsc", "l2", "op32", "pteaex", NULL | ||
358 | }; | ||
359 | |||
360 | static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c) | ||
361 | { | ||
362 | unsigned long i; | ||
363 | |||
364 | seq_printf(m, "cpu flags\t:"); | ||
365 | |||
366 | if (!c->flags) { | ||
367 | seq_printf(m, " %s\n", cpu_flags[0]); | ||
368 | return; | ||
369 | } | ||
370 | |||
371 | for (i = 0; cpu_flags[i]; i++) | ||
372 | if ((c->flags & (1 << i))) | ||
373 | seq_printf(m, " %s", cpu_flags[i+1]); | ||
374 | |||
375 | seq_printf(m, "\n"); | ||
376 | } | ||
377 | |||
378 | static void show_cacheinfo(struct seq_file *m, const char *type, | ||
379 | struct cache_info info) | ||
380 | { | ||
381 | unsigned int cache_size; | ||
382 | |||
383 | cache_size = info.ways * info.sets * info.linesz; | ||
384 | |||
385 | seq_printf(m, "%s size\t: %2dKiB (%d-way)\n", | ||
386 | type, cache_size >> 10, info.ways); | ||
387 | } | ||
388 | |||
389 | /* | ||
390 | * Get CPU information for use by the procfs. | ||
391 | */ | ||
392 | static int show_cpuinfo(struct seq_file *m, void *v) | ||
393 | { | ||
394 | struct sh_cpuinfo *c = v; | ||
395 | unsigned int cpu = c - cpu_data; | ||
396 | |||
397 | if (!cpu_online(cpu)) | ||
398 | return 0; | ||
399 | |||
400 | if (cpu == 0) | ||
401 | seq_printf(m, "machine\t\t: %s\n", get_system_type()); | ||
402 | else | ||
403 | seq_printf(m, "\n"); | ||
404 | |||
405 | seq_printf(m, "processor\t: %d\n", cpu); | ||
406 | seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); | ||
407 | seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); | ||
408 | if (c->cut_major == -1) | ||
409 | seq_printf(m, "cut\t\t: unknown\n"); | ||
410 | else if (c->cut_minor == -1) | ||
411 | seq_printf(m, "cut\t\t: %d.x\n", c->cut_major); | ||
412 | else | ||
413 | seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor); | ||
414 | |||
415 | show_cpuflags(m, c); | ||
416 | |||
417 | seq_printf(m, "cache type\t: "); | ||
418 | |||
419 | /* | ||
420 | * Check for what type of cache we have, we support both the | ||
421 | * unified cache on the SH-2 and SH-3, as well as the harvard | ||
422 | * style cache on the SH-4. | ||
423 | */ | ||
424 | if (c->icache.flags & SH_CACHE_COMBINED) { | ||
425 | seq_printf(m, "unified\n"); | ||
426 | show_cacheinfo(m, "cache", c->icache); | ||
427 | } else { | ||
428 | seq_printf(m, "split (harvard)\n"); | ||
429 | show_cacheinfo(m, "icache", c->icache); | ||
430 | show_cacheinfo(m, "dcache", c->dcache); | ||
431 | } | ||
432 | |||
433 | /* Optional secondary cache */ | ||
434 | if (c->flags & CPU_HAS_L2_CACHE) | ||
435 | show_cacheinfo(m, "scache", c->scache); | ||
436 | |||
437 | seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits); | ||
438 | |||
439 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | ||
440 | c->loops_per_jiffy/(500000/HZ), | ||
441 | (c->loops_per_jiffy/(5000/HZ)) % 100); | ||
442 | |||
443 | return 0; | ||
444 | } | ||
445 | |||
446 | static void *c_start(struct seq_file *m, loff_t *pos) | ||
447 | { | ||
448 | return *pos < NR_CPUS ? cpu_data + *pos : NULL; | ||
449 | } | ||
450 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | ||
451 | { | ||
452 | ++*pos; | ||
453 | return c_start(m, pos); | ||
454 | } | ||
455 | static void c_stop(struct seq_file *m, void *v) | ||
456 | { | ||
457 | } | ||
458 | const struct seq_operations cpuinfo_op = { | ||
459 | .start = c_start, | ||
460 | .next = c_next, | ||
461 | .stop = c_stop, | ||
462 | .show = show_cpuinfo, | ||
463 | }; | ||
464 | #endif /* CONFIG_PROC_FS */ | ||