diff options
author | Paul Mundt <lethal@linux-sh.org> | 2011-01-12 00:37:42 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-12 00:37:42 -0500 |
commit | 83eb95b852902f952ba594447a796ad8146b9462 (patch) | |
tree | 33c199aeeae58b69ad8d6d2a33c2d96ba2b98ddf /arch/sh/kernel | |
parent | efb3e34b6176d30c4fe8635fa8e1beb6280cc2cd (diff) | |
parent | 9bbe7b984096ac45586da2adf26c14069ecb79b2 (diff) |
Merge branch 'sh/sdio' into sh-latest
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 25 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 24 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 4 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 4 |
5 files changed, 33 insertions, 26 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 3681cafdb4af..b8e5bc80aa4a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c | |||
@@ -360,6 +360,8 @@ void __init plat_early_device_setup(void) | |||
360 | 360 | ||
361 | enum { | 361 | enum { |
362 | UNUSED = 0, | 362 | UNUSED = 0, |
363 | ENABLED, | ||
364 | DISABLED, | ||
363 | 365 | ||
364 | /* interrupt sources */ | 366 | /* interrupt sources */ |
365 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | 367 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, |
@@ -375,15 +377,13 @@ enum { | |||
375 | I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, | 377 | I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, |
376 | I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, | 378 | I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, |
377 | SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, | 379 | SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, |
378 | IRDA, | 380 | IRDA, SDHI, CMT, TSIF, SIU, |
379 | SDHI0, SDHI1, SDHI2, SDHI3, | ||
380 | CMT, TSIF, SIU, | ||
381 | TMU0, TMU1, TMU2, | 381 | TMU0, TMU1, TMU2, |
382 | JPU, LCDC, | 382 | JPU, LCDC, |
383 | 383 | ||
384 | /* interrupt groups */ | 384 | /* interrupt groups */ |
385 | 385 | ||
386 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB, | 386 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, USB, |
387 | }; | 387 | }; |
388 | 388 | ||
389 | static struct intc_vect vectors[] __initdata = { | 389 | static struct intc_vect vectors[] __initdata = { |
@@ -412,8 +412,8 @@ static struct intc_vect vectors[] __initdata = { | |||
412 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), | 412 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), |
413 | INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), | 413 | INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), |
414 | INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), | 414 | INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), |
415 | INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), | 415 | INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0), |
416 | INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), | 416 | INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0), |
417 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), | 417 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), |
418 | INTC_VECT(SIU, 0xf80), | 418 | INTC_VECT(SIU, 0xf80), |
419 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), | 419 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), |
@@ -431,7 +431,6 @@ static struct intc_group groups[] __initdata = { | |||
431 | INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), | 431 | INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), |
432 | INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), | 432 | INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), |
433 | INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), | 433 | INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), |
434 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), | ||
435 | INTC_GROUP(USB, USBI0, USBI1), | 434 | INTC_GROUP(USB, USBI0, USBI1), |
436 | }; | 435 | }; |
437 | 436 | ||
@@ -452,7 +451,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { | |||
452 | { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, | 451 | { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, |
453 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, | 452 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, |
454 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | 453 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ |
455 | { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, | 454 | { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } }, |
456 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | 455 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ |
457 | { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, | 456 | { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, |
458 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ | 457 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ |
@@ -488,9 +487,13 @@ static struct intc_mask_reg ack_registers[] __initdata = { | |||
488 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 487 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
489 | }; | 488 | }; |
490 | 489 | ||
491 | static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups, | 490 | static struct intc_desc intc_desc __initdata = { |
492 | mask_registers, prio_registers, sense_registers, | 491 | .name = "sh7343", |
493 | ack_registers); | 492 | .force_enable = ENABLED, |
493 | .force_disable = DISABLED, | ||
494 | .hw = INTC_HW_DESC(vectors, groups, mask_registers, | ||
495 | prio_registers, sense_registers, ack_registers), | ||
496 | }; | ||
494 | 497 | ||
495 | void __init plat_irq_setup(void) | 498 | void __init plat_irq_setup(void) |
496 | { | 499 | { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 8dab9e1bbd89..9b3a6aa9081c 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | |||
@@ -319,6 +319,8 @@ void __init plat_early_device_setup(void) | |||
319 | 319 | ||
320 | enum { | 320 | enum { |
321 | UNUSED=0, | 321 | UNUSED=0, |
322 | ENABLED, | ||
323 | DISABLED, | ||
322 | 324 | ||
323 | /* interrupt sources */ | 325 | /* interrupt sources */ |
324 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | 326 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, |
@@ -332,14 +334,13 @@ enum { | |||
332 | DENC, MSIOF, | 334 | DENC, MSIOF, |
333 | FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, | 335 | FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, |
334 | I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, | 336 | I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, |
335 | SDHI0, SDHI1, SDHI2, SDHI3, | 337 | SDHI, CMT, TSIF, SIU, |
336 | CMT, TSIF, SIU, | ||
337 | TMU0, TMU1, TMU2, | 338 | TMU0, TMU1, TMU2, |
338 | VEU2, LCDC, | 339 | VEU2, LCDC, |
339 | 340 | ||
340 | /* interrupt groups */ | 341 | /* interrupt groups */ |
341 | 342 | ||
342 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, SDHI, | 343 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, |
343 | }; | 344 | }; |
344 | 345 | ||
345 | static struct intc_vect vectors[] __initdata = { | 346 | static struct intc_vect vectors[] __initdata = { |
@@ -364,8 +365,8 @@ static struct intc_vect vectors[] __initdata = { | |||
364 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), | 365 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), |
365 | INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), | 366 | INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), |
366 | INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), | 367 | INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), |
367 | INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), | 368 | INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0), |
368 | INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), | 369 | INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0), |
369 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), | 370 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), |
370 | INTC_VECT(SIU, 0xf80), | 371 | INTC_VECT(SIU, 0xf80), |
371 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), | 372 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), |
@@ -381,7 +382,6 @@ static struct intc_group groups[] __initdata = { | |||
381 | INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, | 382 | INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, |
382 | FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), | 383 | FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), |
383 | INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), | 384 | INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), |
384 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), | ||
385 | }; | 385 | }; |
386 | 386 | ||
387 | static struct intc_mask_reg mask_registers[] __initdata = { | 387 | static struct intc_mask_reg mask_registers[] __initdata = { |
@@ -403,7 +403,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { | |||
403 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, | 403 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, |
404 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, | 404 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, |
405 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | 405 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ |
406 | { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, | 406 | { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } }, |
407 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | 407 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ |
408 | { 0, 0, 0, CMT, 0, USB, } }, | 408 | { 0, 0, 0, CMT, 0, USB, } }, |
409 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ | 409 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ |
@@ -441,9 +441,13 @@ static struct intc_mask_reg ack_registers[] __initdata = { | |||
441 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 441 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
442 | }; | 442 | }; |
443 | 443 | ||
444 | static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups, | 444 | static struct intc_desc intc_desc __initdata = { |
445 | mask_registers, prio_registers, sense_registers, | 445 | .name = "sh7366", |
446 | ack_registers); | 446 | .force_enable = ENABLED, |
447 | .force_disable = DISABLED, | ||
448 | .hw = INTC_HW_DESC(vectors, groups, mask_registers, | ||
449 | prio_registers, sense_registers, ack_registers), | ||
450 | }; | ||
447 | 451 | ||
448 | void __init plat_irq_setup(void) | 452 | void __init plat_irq_setup(void) |
449 | { | 453 | { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index d551ed8dea95..a164f8924258 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
@@ -699,7 +699,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { | |||
699 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, | 699 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, |
700 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, | 700 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, |
701 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | 701 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ |
702 | { DISABLED, DISABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } }, | 702 | { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } }, |
703 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | 703 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ |
704 | { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, | 704 | { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, |
705 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ | 705 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 0eadefdbbba1..d7641221ee42 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c | |||
@@ -719,7 +719,7 @@ static struct intc_group groups[] __initdata = { | |||
719 | static struct intc_mask_reg mask_registers[] __initdata = { | 719 | static struct intc_mask_reg mask_registers[] __initdata = { |
720 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ | 720 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ |
721 | { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, | 721 | { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, |
722 | 0, DISABLED, ENABLED, ENABLED } }, | 722 | 0, ENABLED, ENABLED, ENABLED } }, |
723 | { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ | 723 | { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ |
724 | { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, | 724 | { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, |
725 | { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ | 725 | { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ |
@@ -736,7 +736,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { | |||
736 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, | 736 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, |
737 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, | 737 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, |
738 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | 738 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ |
739 | { 0, DISABLED, ENABLED, ENABLED, | 739 | { 0, ENABLED, ENABLED, ENABLED, |
740 | 0, 0, SCIFA_SCIFA2, SIU_SIUI } }, | 740 | 0, 0, SCIFA_SCIFA2, SIU_SIUI } }, |
741 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | 741 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ |
742 | { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, | 742 | { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 828c9657eb52..c598a7f61b7f 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | |||
@@ -1144,7 +1144,7 @@ static struct intc_group groups[] __initdata = { | |||
1144 | static struct intc_mask_reg mask_registers[] __initdata = { | 1144 | static struct intc_mask_reg mask_registers[] __initdata = { |
1145 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ | 1145 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ |
1146 | { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, | 1146 | { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, |
1147 | 0, DISABLED, ENABLED, ENABLED } }, | 1147 | 0, ENABLED, ENABLED, ENABLED } }, |
1148 | { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ | 1148 | { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ |
1149 | { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, | 1149 | { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, |
1150 | DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, | 1150 | DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, |
@@ -1166,7 +1166,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { | |||
1166 | { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, | 1166 | { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, |
1167 | I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, | 1167 | I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, |
1168 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | 1168 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ |
1169 | { DISABLED, DISABLED, ENABLED, ENABLED, | 1169 | { DISABLED, ENABLED, ENABLED, ENABLED, |
1170 | 0, 0, SCIFA5, FSI } }, | 1170 | 0, 0, SCIFA5, FSI } }, |
1171 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | 1171 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ |
1172 | { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, | 1172 | { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, |