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authorSteven Whitehouse <swhiteho@redhat.com>2006-09-28 08:29:59 -0400
committerSteven Whitehouse <swhiteho@redhat.com>2006-09-28 08:29:59 -0400
commit185a257f2f73bcd89050ad02da5bedbc28fc43fa (patch)
tree5e32586114534ed3f2165614cba3d578f5d87307 /arch/sh/kernel/timers/timer-tmu.c
parent3f1a9aaeffd8d1cbc5ab9776c45cbd66af1c9699 (diff)
parenta77c64c1a641950626181b4857abb701d8f38ccc (diff)
Merge branch 'master' into gfs2
Diffstat (limited to 'arch/sh/kernel/timers/timer-tmu.c')
-rw-r--r--arch/sh/kernel/timers/timer-tmu.c24
1 files changed, 19 insertions, 5 deletions
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index d4212add53b2..205816fcf0da 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -132,17 +132,17 @@ static unsigned long tmu_timer_get_frequency(void)
132 ctrl_outl(0xffffffff, TMU0_TCOR); 132 ctrl_outl(0xffffffff, TMU0_TCOR);
133 ctrl_outl(0xffffffff, TMU0_TCNT); 133 ctrl_outl(0xffffffff, TMU0_TCNT);
134 134
135 rtc_get_time(&ts2); 135 rtc_sh_get_time(&ts2);
136 136
137 do { 137 do {
138 rtc_get_time(&ts1); 138 rtc_sh_get_time(&ts1);
139 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); 139 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
140 140
141 /* actually start the timer */ 141 /* actually start the timer */
142 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); 142 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
143 143
144 do { 144 do {
145 rtc_get_time(&ts2); 145 rtc_sh_get_time(&ts2);
146 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec); 146 } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
147 147
148 freq = 0xffffffff - ctrl_inl(TMU0_TCNT); 148 freq = 0xffffffff - ctrl_inl(TMU0_TCNT);
@@ -188,6 +188,18 @@ static struct clk tmu0_clk = {
188 .ops = &tmu_clk_ops, 188 .ops = &tmu_clk_ops,
189}; 189};
190 190
191static int tmu_timer_start(void)
192{
193 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
194 return 0;
195}
196
197static int tmu_timer_stop(void)
198{
199 ctrl_outb(0, TMU_TSTR);
200 return 0;
201}
202
191static int tmu_timer_init(void) 203static int tmu_timer_init(void)
192{ 204{
193 unsigned long interval; 205 unsigned long interval;
@@ -197,7 +209,7 @@ static int tmu_timer_init(void)
197 tmu0_clk.parent = clk_get("module_clk"); 209 tmu0_clk.parent = clk_get("module_clk");
198 210
199 /* Start TMU0 */ 211 /* Start TMU0 */
200 ctrl_outb(0, TMU_TSTR); 212 tmu_timer_stop();
201#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760) 213#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760)
202 ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); 214 ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
203#endif 215#endif
@@ -211,13 +223,15 @@ static int tmu_timer_init(void)
211 ctrl_outl(interval, TMU0_TCOR); 223 ctrl_outl(interval, TMU0_TCOR);
212 ctrl_outl(interval, TMU0_TCNT); 224 ctrl_outl(interval, TMU0_TCNT);
213 225
214 ctrl_outb(TMU_TSTR_INIT, TMU_TSTR); 226 tmu_timer_start();
215 227
216 return 0; 228 return 0;
217} 229}
218 230
219struct sys_timer_ops tmu_timer_ops = { 231struct sys_timer_ops tmu_timer_ops = {
220 .init = tmu_timer_init, 232 .init = tmu_timer_init,
233 .start = tmu_timer_start,
234 .stop = tmu_timer_stop,
221 .get_frequency = tmu_timer_get_frequency, 235 .get_frequency = tmu_timer_get_frequency,
222 .get_offset = tmu_timer_get_offset, 236 .get_offset = tmu_timer_get_offset,
223}; 237};