diff options
author | Paul Mundt <lethal@linux-sh.org> | 2008-12-17 01:33:43 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-12-22 04:44:47 -0500 |
commit | 740a3e677b70181d5e2b1458a27891209e3bf635 (patch) | |
tree | 9b5de2213f9a6ca036398bbc411a9982444d4351 /arch/sh/kernel/head_32.S | |
parent | 8a655053ca1593dd160dac2a4ee638fdec037d86 (diff) |
sh: Enable skipping of bss on debug platforms for sh32 also.
This enables the same functionality that sh64 has for sh32. When running
on simulated hardware or via remote memory via the debug interface,
memory is gauranteed to be zero on boot already, and skipping the zeroing
of BSS has measurable boot time benefits.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/head_32.S')
-rw-r--r-- | arch/sh/kernel/head_32.S | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S index ae0a382a82eb..788605ff7088 100644 --- a/arch/sh/kernel/head_32.S +++ b/arch/sh/kernel/head_32.S | |||
@@ -80,8 +80,14 @@ ENTRY(_stext) | |||
80 | mov.l 7f, r0 | 80 | mov.l 7f, r0 |
81 | ldc r0, r7_bank ! ... and initial thread_info | 81 | ldc r0, r7_bank ! ... and initial thread_info |
82 | #endif | 82 | #endif |
83 | 83 | ||
84 | ! Clear BSS area | 84 | #ifndef CONFIG_SH_NO_BSS_INIT |
85 | /* | ||
86 | * Don't clear BSS if running on slow platforms such as an RTL simulation, | ||
87 | * remote memory via SHdebug link, etc. For these the memory can be guaranteed | ||
88 | * to be all zero on boot anyway. | ||
89 | */ | ||
90 | ! Clear BSS area | ||
85 | #ifdef CONFIG_SMP | 91 | #ifdef CONFIG_SMP |
86 | mov.l 3f, r0 | 92 | mov.l 3f, r0 |
87 | cmp/eq #0, r0 ! skip clear if set to zero | 93 | cmp/eq #0, r0 ! skip clear if set to zero |
@@ -97,6 +103,8 @@ ENTRY(_stext) | |||
97 | mov.l r0,@-r2 | 103 | mov.l r0,@-r2 |
98 | 104 | ||
99 | 10: | 105 | 10: |
106 | #endif | ||
107 | |||
100 | ! Additional CPU initialization | 108 | ! Additional CPU initialization |
101 | mov.l 6f, r0 | 109 | mov.l 6f, r0 |
102 | jsr @r0 | 110 | jsr @r0 |