diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-01-25 22:58:40 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-01-25 22:58:40 -0500 |
commit | 9d56dd3b083a3bec56e9da35ce07baca81030b03 (patch) | |
tree | a9df9d514fbc32defc1ca8a6d7c2795f15b8a128 /arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |
parent | a077e91690fb32a1453423b2cf1df3492fd30c3a (diff) |
sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7785.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index f685b9b21999..23448d8c6711 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |||
@@ -541,17 +541,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567, | |||
541 | void __init plat_irq_setup(void) | 541 | void __init plat_irq_setup(void) |
542 | { | 542 | { |
543 | /* disable IRQ3-0 + IRQ7-4 */ | 543 | /* disable IRQ3-0 + IRQ7-4 */ |
544 | ctrl_outl(0xff000000, INTC_INTMSK0); | 544 | __raw_writel(0xff000000, INTC_INTMSK0); |
545 | 545 | ||
546 | /* disable IRL3-0 + IRL7-4 */ | 546 | /* disable IRL3-0 + IRL7-4 */ |
547 | ctrl_outl(0xc0000000, INTC_INTMSK1); | 547 | __raw_writel(0xc0000000, INTC_INTMSK1); |
548 | ctrl_outl(0xfffefffe, INTC_INTMSK2); | 548 | __raw_writel(0xfffefffe, INTC_INTMSK2); |
549 | 549 | ||
550 | /* select IRL mode for IRL3-0 + IRL7-4 */ | 550 | /* select IRL mode for IRL3-0 + IRL7-4 */ |
551 | ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); | 551 | __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); |
552 | 552 | ||
553 | /* disable holding function, ie enable "SH-4 Mode" */ | 553 | /* disable holding function, ie enable "SH-4 Mode" */ |
554 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0); | 554 | __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0); |
555 | 555 | ||
556 | register_intc_controller(&intc_desc); | 556 | register_intc_controller(&intc_desc); |
557 | } | 557 | } |
@@ -561,32 +561,32 @@ void __init plat_irq_setup_pins(int mode) | |||
561 | switch (mode) { | 561 | switch (mode) { |
562 | case IRQ_MODE_IRQ7654: | 562 | case IRQ_MODE_IRQ7654: |
563 | /* select IRQ mode for IRL7-4 */ | 563 | /* select IRQ mode for IRL7-4 */ |
564 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); | 564 | __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0); |
565 | register_intc_controller(&intc_desc_irq4567); | 565 | register_intc_controller(&intc_desc_irq4567); |
566 | break; | 566 | break; |
567 | case IRQ_MODE_IRQ3210: | 567 | case IRQ_MODE_IRQ3210: |
568 | /* select IRQ mode for IRL3-0 */ | 568 | /* select IRQ mode for IRL3-0 */ |
569 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); | 569 | __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0); |
570 | register_intc_controller(&intc_desc_irq0123); | 570 | register_intc_controller(&intc_desc_irq0123); |
571 | break; | 571 | break; |
572 | case IRQ_MODE_IRL7654: | 572 | case IRQ_MODE_IRL7654: |
573 | /* enable IRL7-4 but don't provide any masking */ | 573 | /* enable IRL7-4 but don't provide any masking */ |
574 | ctrl_outl(0x40000000, INTC_INTMSKCLR1); | 574 | __raw_writel(0x40000000, INTC_INTMSKCLR1); |
575 | ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); | 575 | __raw_writel(0x0000fffe, INTC_INTMSKCLR2); |
576 | break; | 576 | break; |
577 | case IRQ_MODE_IRL3210: | 577 | case IRQ_MODE_IRL3210: |
578 | /* enable IRL0-3 but don't provide any masking */ | 578 | /* enable IRL0-3 but don't provide any masking */ |
579 | ctrl_outl(0x80000000, INTC_INTMSKCLR1); | 579 | __raw_writel(0x80000000, INTC_INTMSKCLR1); |
580 | ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); | 580 | __raw_writel(0xfffe0000, INTC_INTMSKCLR2); |
581 | break; | 581 | break; |
582 | case IRQ_MODE_IRL7654_MASK: | 582 | case IRQ_MODE_IRL7654_MASK: |
583 | /* enable IRL7-4 and mask using cpu intc controller */ | 583 | /* enable IRL7-4 and mask using cpu intc controller */ |
584 | ctrl_outl(0x40000000, INTC_INTMSKCLR1); | 584 | __raw_writel(0x40000000, INTC_INTMSKCLR1); |
585 | register_intc_controller(&intc_desc_irl4567); | 585 | register_intc_controller(&intc_desc_irl4567); |
586 | break; | 586 | break; |
587 | case IRQ_MODE_IRL3210_MASK: | 587 | case IRQ_MODE_IRL3210_MASK: |
588 | /* enable IRL0-3 and mask using cpu intc controller */ | 588 | /* enable IRL0-3 and mask using cpu intc controller */ |
589 | ctrl_outl(0x80000000, INTC_INTMSKCLR1); | 589 | __raw_writel(0x80000000, INTC_INTMSKCLR1); |
590 | register_intc_controller(&intc_desc_irl0123); | 590 | register_intc_controller(&intc_desc_irl0123); |
591 | break; | 591 | break; |
592 | default: | 592 | default: |