diff options
| author | Magnus Damm <damm@opensource.se> | 2010-05-11 01:00:47 -0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-05-13 04:33:17 -0400 |
| commit | c77a9c3edee079fe0411d98cfb9d872bc336ee32 (patch) | |
| tree | b368c77d6b391c37ff1674baaf5334ab3092ec1f /arch/sh/kernel/cpu/sh4a/clock-sh7785.c | |
| parent | d8ef3ccc1c99ae51128b28aaed6e8afc43af71ff (diff) | |
sh: get rid of mstp32 clock name and id
Remove the name and the id from SH_CLK_MSTP32().
Now when lookups are handled by clkdev they are
not needed anymore.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/clock-sh7785.c')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c index 24d7208ff705..4625b72ba50c 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c | |||
| @@ -95,29 +95,29 @@ enum { MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, | |||
| 95 | 95 | ||
| 96 | static struct clk mstp_clks[MSTP_NR] = { | 96 | static struct clk mstp_clks[MSTP_NR] = { |
| 97 | /* MSTPCR0 */ | 97 | /* MSTPCR0 */ |
| 98 | [MSTP029] = SH_CLK_MSTP32("sci_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0), | 98 | [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0), |
| 99 | [MSTP028] = SH_CLK_MSTP32("sci_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0), | 99 | [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0), |
| 100 | [MSTP027] = SH_CLK_MSTP32("sci_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0), | 100 | [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0), |
| 101 | [MSTP026] = SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0), | 101 | [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0), |
| 102 | [MSTP025] = SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0), | 102 | [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0), |
| 103 | [MSTP024] = SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0), | 103 | [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0), |
| 104 | [MSTP021] = SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0), | 104 | [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 21, 0), |
| 105 | [MSTP020] = SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0), | 105 | [MSTP020] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 20, 0), |
| 106 | [MSTP017] = SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0), | 106 | [MSTP017] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 17, 0), |
| 107 | [MSTP016] = SH_CLK_MSTP32("hac_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 16, 0), | 107 | [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0), |
| 108 | [MSTP013] = SH_CLK_MSTP32("mmcif_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 13, 0), | 108 | [MSTP013] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 13, 0), |
| 109 | [MSTP012] = SH_CLK_MSTP32("flctl_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 12, 0), | 109 | [MSTP012] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 12, 0), |
| 110 | [MSTP009] = SH_CLK_MSTP32("tmu345_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 9, 0), | 110 | [MSTP009] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0), |
| 111 | [MSTP008] = SH_CLK_MSTP32("tmu012_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 8, 0), | 111 | [MSTP008] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0), |
| 112 | [MSTP003] = SH_CLK_MSTP32("siof_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 3, 0), | 112 | [MSTP003] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 3, 0), |
| 113 | [MSTP002] = SH_CLK_MSTP32("hspi_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 2, 0), | 113 | [MSTP002] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 2, 0), |
| 114 | 114 | ||
| 115 | /* MSTPCR1 */ | 115 | /* MSTPCR1 */ |
| 116 | [MSTP119] = SH_CLK_MSTP32("hudi_fck", -1, NULL, MSTPCR1, 19, 0), | 116 | [MSTP119] = SH_CLK_MSTP32(NULL, MSTPCR1, 19, 0), |
| 117 | [MSTP117] = SH_CLK_MSTP32("ubc_fck", -1, NULL, MSTPCR1, 17, 0), | 117 | [MSTP117] = SH_CLK_MSTP32(NULL, MSTPCR1, 17, 0), |
| 118 | [MSTP105] = SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0), | 118 | [MSTP105] = SH_CLK_MSTP32(NULL, MSTPCR1, 5, 0), |
| 119 | [MSTP104] = SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0), | 119 | [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0), |
| 120 | [MSTP100] = SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0), | 120 | [MSTP100] = SH_CLK_MSTP32(NULL, MSTPCR1, 0, 0), |
| 121 | }; | 121 | }; |
| 122 | 122 | ||
| 123 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | 123 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } |