aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
diff options
context:
space:
mode:
authorMagnus Damm <damm@opensource.se>2010-05-10 10:01:44 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-05-10 22:48:47 -0400
commit08134c3c629bf128245f721391b96a858d88e997 (patch)
tree774dddf17cd1f6290f690cdce252a02c29f88c0e /arch/sh/kernel/cpu/sh4a/clock-sh7724.c
parentd97432f1014c73bbace9eb1e67742c1bcab0c3cd (diff)
sh: get rid of hwblk clock names
Remove the clock name from sh7722/sh7723/sh7724 hwblk clocks. Lookup is handled by clkdev. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/clock-sh7724.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c114
1 files changed, 54 insertions, 60 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index fe59f34a6e00..6f3d400f2f20 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -172,67 +172,61 @@ struct clk div6_clks[] = {
172 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), 172 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
173}; 173};
174 174
175#define R_CLK (&r_clk)
176#define P_CLK (&div4_clks[DIV4_P])
177#define B_CLK (&div4_clks[DIV4_B])
178#define I_CLK (&div4_clks[DIV4_I])
179#define SH_CLK (&div4_clks[DIV4_SH])
180
181static struct clk mstp_clks[HWBLK_NR] = { 175static struct clk mstp_clks[HWBLK_NR] = {
182 SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT), 176 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
183 SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT), 177 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
184 SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT), 178 SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
185 SH_HWBLK_CLK("rs0", -1, B_CLK, HWBLK_RSMEM, CLK_ENABLE_ON_INIT), 179 SH_HWBLK_CLK(HWBLK_RSMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
186 SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT), 180 SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
187 SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT), 181 SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
188 SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT), 182 SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
189 SH_HWBLK_CLK("intc0", -1, P_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT), 183 SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_P], CLK_ENABLE_ON_INIT),
190 SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0), 184 SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
191 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), 185 SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
192 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), 186 SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
193 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), 187 SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
194 SH_HWBLK_CLK("tmu012_fck", -1, P_CLK, HWBLK_TMU0, 0), 188 SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
195 SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0), 189 SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
196 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), 190 SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
197 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), 191 SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
198 SH_HWBLK_CLK("tmu345_fck", -1, P_CLK, HWBLK_TMU1, 0), 192 SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
199 SH_HWBLK_CLK("sci_fck", -1, P_CLK, HWBLK_SCIF0, 0), 193 SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
200 SH_HWBLK_CLK("sci_fck", -1, P_CLK, HWBLK_SCIF1, 0), 194 SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
201 SH_HWBLK_CLK("sci_fck", -1, P_CLK, HWBLK_SCIF2, 0), 195 SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
202 SH_HWBLK_CLK("sci_fck", -1, B_CLK, HWBLK_SCIF3, 0), 196 SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
203 SH_HWBLK_CLK("sci_fck", -1, B_CLK, HWBLK_SCIF4, 0), 197 SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
204 SH_HWBLK_CLK("sci_fck", -1, B_CLK, HWBLK_SCIF5, 0), 198 SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
205 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), 199 SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
206 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), 200 SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
207 201
208 SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0), 202 SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
209 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), 203 SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
210 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC0, 0), 204 SH_HWBLK_CLK(HWBLK_IIC0, &div4_clks[DIV4_P], 0),
211 SH_HWBLK_CLK("i2c1", -1, P_CLK, HWBLK_IIC1, 0), 205 SH_HWBLK_CLK(HWBLK_IIC1, &div4_clks[DIV4_P], 0),
212 206
213 SH_HWBLK_CLK("mmc0", -1, B_CLK, HWBLK_MMC, 0), 207 SH_HWBLK_CLK(HWBLK_MMC, &div4_clks[DIV4_B], 0),
214 SH_HWBLK_CLK("eth0", -1, B_CLK, HWBLK_ETHER, 0), 208 SH_HWBLK_CLK(HWBLK_ETHER, &div4_clks[DIV4_B], 0),
215 SH_HWBLK_CLK("atapi0", -1, B_CLK, HWBLK_ATAPI, 0), 209 SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_B], 0),
216 SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0), 210 SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
217 SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0), 211 SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
218 SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0), 212 SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
219 SH_HWBLK_CLK("usb1", -1, B_CLK, HWBLK_USB1, 0), 213 SH_HWBLK_CLK(HWBLK_USB1, &div4_clks[DIV4_B], 0),
220 SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB0, 0), 214 SH_HWBLK_CLK(HWBLK_USB0, &div4_clks[DIV4_B], 0),
221 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0), 215 SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
222 SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0), 216 SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
223 SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0), 217 SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
224 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, 0), 218 SH_HWBLK_CLK(HWBLK_VEU1, &div4_clks[DIV4_B], 0),
225 SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0), 219 SH_HWBLK_CLK(HWBLK_CEU1, &div4_clks[DIV4_B], 0),
226 SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0), 220 SH_HWBLK_CLK(HWBLK_BEU1, &div4_clks[DIV4_B], 0),
227 SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0), 221 SH_HWBLK_CLK(HWBLK_2DDMAC, &div4_clks[DIV4_SH], 0),
228 SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0), 222 SH_HWBLK_CLK(HWBLK_SPU, &div4_clks[DIV4_B], 0),
229 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0), 223 SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
230 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0), 224 SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
231 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0), 225 SH_HWBLK_CLK(HWBLK_BEU0, &div4_clks[DIV4_B], 0),
232 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0), 226 SH_HWBLK_CLK(HWBLK_CEU0, &div4_clks[DIV4_B], 0),
233 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, 0), 227 SH_HWBLK_CLK(HWBLK_VEU0, &div4_clks[DIV4_B], 0),
234 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0), 228 SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
235 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), 229 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
236}; 230};
237 231
238#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } 232#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }