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authorPaul Mundt <lethal@linux-sh.org>2011-01-13 01:06:28 -0500
committerPaul Mundt <lethal@linux-sh.org>2011-01-13 01:06:28 -0500
commitf43dc23d5ea91fca257be02138a255f02d98e806 (patch)
treeb29722f6e965316e90ac97abf79923ced250dc21 /arch/sh/kernel/cpu/sh4/setup-sh4-202.c
parentf8e53553f452dcbf67cb89c8cba63a1cd6eb4cc0 (diff)
parent4162cf64973df51fc885825bc9ca4d055891c49f (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into common/serial-rework
Conflicts: arch/sh/kernel/cpu/sh2/setup-sh7619.c arch/sh/kernel/cpu/sh2a/setup-mxg.c arch/sh/kernel/cpu/sh2a/setup-sh7201.c arch/sh/kernel/cpu/sh2a/setup-sh7203.c arch/sh/kernel/cpu/sh2a/setup-sh7206.c arch/sh/kernel/cpu/sh3/setup-sh7705.c arch/sh/kernel/cpu/sh3/setup-sh770x.c arch/sh/kernel/cpu/sh3/setup-sh7710.c arch/sh/kernel/cpu/sh3/setup-sh7720.c arch/sh/kernel/cpu/sh4/setup-sh4-202.c arch/sh/kernel/cpu/sh4/setup-sh7750.c arch/sh/kernel/cpu/sh4/setup-sh7760.c arch/sh/kernel/cpu/sh4a/setup-sh7343.c arch/sh/kernel/cpu/sh4a/setup-sh7366.c arch/sh/kernel/cpu/sh4a/setup-sh7722.c arch/sh/kernel/cpu/sh4a/setup-sh7723.c arch/sh/kernel/cpu/sh4a/setup-sh7724.c arch/sh/kernel/cpu/sh4a/setup-sh7763.c arch/sh/kernel/cpu/sh4a/setup-sh7770.c arch/sh/kernel/cpu/sh4a/setup-sh7780.c arch/sh/kernel/cpu/sh4a/setup-sh7785.c arch/sh/kernel/cpu/sh4a/setup-sh7786.c arch/sh/kernel/cpu/sh4a/setup-shx3.c arch/sh/kernel/cpu/sh5/setup-sh5.c drivers/serial/sh-sci.c drivers/serial/sh-sci.h include/linux/serial_sci.h
Diffstat (limited to 'arch/sh/kernel/cpu/sh4/setup-sh4-202.c')
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh4-202.c40
1 files changed, 14 insertions, 26 deletions
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index ec2104b49ef7..5b2833159b7d 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -15,38 +15,31 @@
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18static struct plat_sci_port sci_platform_data[] = { 18static struct plat_sci_port scif0_platform_data = {
19 { 19 .mapbase = 0xffe80000,
20 .mapbase = 0xffe80000, 20 .flags = UPF_BOOT_AUTOCONF,
21 .flags = UPF_BOOT_AUTOCONF, 21 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, 22 .scbrr_algo_id = SCBRR_ALGO_2,
23 .scbrr_algo_id = SCBRR_ALGO_2, 23 .type = PORT_SCIF,
24 .type = PORT_SCIF, 24 .irqs = { 40, 41, 43, 42 },
25 .irqs = { 40, 41, 43, 42 },
26 }, {
27 .flags = 0,
28 }
29}; 25};
30 26
31static struct platform_device sci_device = { 27static struct platform_device scif0_device = {
32 .name = "sh-sci", 28 .name = "sh-sci",
33 .id = -1, 29 .id = 0,
34 .dev = { 30 .dev = {
35 .platform_data = sci_platform_data, 31 .platform_data = &scif0_platform_data,
36 }, 32 },
37}; 33};
38 34
39static struct sh_timer_config tmu0_platform_data = { 35static struct sh_timer_config tmu0_platform_data = {
40 .name = "TMU0",
41 .channel_offset = 0x04, 36 .channel_offset = 0x04,
42 .timer_bit = 0, 37 .timer_bit = 0,
43 .clk = "peripheral_clk",
44 .clockevent_rating = 200, 38 .clockevent_rating = 200,
45}; 39};
46 40
47static struct resource tmu0_resources[] = { 41static struct resource tmu0_resources[] = {
48 [0] = { 42 [0] = {
49 .name = "TMU0",
50 .start = 0xffd80008, 43 .start = 0xffd80008,
51 .end = 0xffd80013, 44 .end = 0xffd80013,
52 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
@@ -68,16 +61,13 @@ static struct platform_device tmu0_device = {
68}; 61};
69 62
70static struct sh_timer_config tmu1_platform_data = { 63static struct sh_timer_config tmu1_platform_data = {
71 .name = "TMU1",
72 .channel_offset = 0x10, 64 .channel_offset = 0x10,
73 .timer_bit = 1, 65 .timer_bit = 1,
74 .clk = "peripheral_clk",
75 .clocksource_rating = 200, 66 .clocksource_rating = 200,
76}; 67};
77 68
78static struct resource tmu1_resources[] = { 69static struct resource tmu1_resources[] = {
79 [0] = { 70 [0] = {
80 .name = "TMU1",
81 .start = 0xffd80014, 71 .start = 0xffd80014,
82 .end = 0xffd8001f, 72 .end = 0xffd8001f,
83 .flags = IORESOURCE_MEM, 73 .flags = IORESOURCE_MEM,
@@ -99,15 +89,12 @@ static struct platform_device tmu1_device = {
99}; 89};
100 90
101static struct sh_timer_config tmu2_platform_data = { 91static struct sh_timer_config tmu2_platform_data = {
102 .name = "TMU2",
103 .channel_offset = 0x1c, 92 .channel_offset = 0x1c,
104 .timer_bit = 2, 93 .timer_bit = 2,
105 .clk = "peripheral_clk",
106}; 94};
107 95
108static struct resource tmu2_resources[] = { 96static struct resource tmu2_resources[] = {
109 [0] = { 97 [0] = {
110 .name = "TMU2",
111 .start = 0xffd80020, 98 .start = 0xffd80020,
112 .end = 0xffd8002f, 99 .end = 0xffd8002f,
113 .flags = IORESOURCE_MEM, 100 .flags = IORESOURCE_MEM,
@@ -129,7 +116,7 @@ static struct platform_device tmu2_device = {
129}; 116};
130 117
131static struct platform_device *sh4202_devices[] __initdata = { 118static struct platform_device *sh4202_devices[] __initdata = {
132 &sci_device, 119 &scif0_device,
133 &tmu0_device, 120 &tmu0_device,
134 &tmu1_device, 121 &tmu1_device,
135 &tmu2_device, 122 &tmu2_device,
@@ -140,9 +127,10 @@ static int __init sh4202_devices_setup(void)
140 return platform_add_devices(sh4202_devices, 127 return platform_add_devices(sh4202_devices,
141 ARRAY_SIZE(sh4202_devices)); 128 ARRAY_SIZE(sh4202_devices));
142} 129}
143__initcall(sh4202_devices_setup); 130arch_initcall(sh4202_devices_setup);
144 131
145static struct platform_device *sh4202_early_devices[] __initdata = { 132static struct platform_device *sh4202_early_devices[] __initdata = {
133 &scif0_device,
146 &tmu0_device, 134 &tmu0_device,
147 &tmu1_device, 135 &tmu1_device,
148 &tmu2_device, 136 &tmu2_device,
@@ -203,7 +191,7 @@ void __init plat_irq_setup_pins(int mode)
203{ 191{
204 switch (mode) { 192 switch (mode) {
205 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */ 193 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
206 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 194 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
207 register_intc_controller(&intc_desc_irlm); 195 register_intc_controller(&intc_desc_irlm);
208 break; 196 break;
209 default: 197 default: