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authorMagnus Damm <damm@igel.co.jp>2007-08-12 02:22:02 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-09-20 22:57:49 -0400
commit6ef5fb2cfcedaab4a43493c8f2305a67c0ce1af6 (patch)
treeba5b4c0a19a1d81047d49488b6fe3e3b02e824cf /arch/sh/kernel/cpu/sh3/setup-sh7705.c
parentd6aee69ca11550f3ca325ceaa020ea74e173478f (diff)
sh: intc - add a clear register to struct intc_prio_reg
We need a secondary register member in struct intc_prio_reg to support dual priority registers used by ipi on x3. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh3/setup-sh7705.c')
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 568cc08c254b..a1b342e170c6 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -73,14 +73,14 @@ static struct intc_prio priorities[] = {
73}; 73};
74 74
75static struct intc_prio_reg prio_registers[] = { 75static struct intc_prio_reg prio_registers[] = {
76 { 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 76 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
77 { 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } }, 77 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
78 { 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 78 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
79 { 0xa4000018, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } }, 79 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
80 { 0xa400001a, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } }, 80 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
81 { 0xa4080000, 16, 4, /* IPRF */ { 0, 0, USB } }, 81 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
82 { 0xa4080002, 16, 4, /* IPRG */ { TPU0, TPU1 } }, 82 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
83 { 0xa4080004, 16, 4, /* IPRH */ { TPU2, TPU3 } }, 83 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
84 84
85}; 85};
86 86