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authorMagnus Damm <damm@igel.co.jp>2007-06-15 05:56:19 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-06-15 05:56:19 -0400
commit68abdbbb03476a60d932eeba0035dd5069afec38 (patch)
treede3854f76d6d9aec121c432a3cd276bb756003c9 /arch/sh/kernel/cpu/sh3/setup-sh7705.c
parent50f63f2518ee68bc132d357d2b6fdb7f60ef79e0 (diff)
sh: rework ipr code
This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh3/setup-sh7705.c')
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c40
1 files changed, 22 insertions, 18 deletions
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 1983fb7ad6ea..a55b8ce2c54c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -48,7 +48,7 @@ static int __init sh7705_devices_setup(void)
48} 48}
49__initcall(sh7705_devices_setup); 49__initcall(sh7705_devices_setup);
50 50
51static struct ipr_data sh7705_ipr_map[] = { 51static struct ipr_data ipr_irq_table[] = {
52 /* IRQ, IPR-idx, shift, priority */ 52 /* IRQ, IPR-idx, shift, priority */
53 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 53 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
54 { 17, 0, 8, 2 }, /* TMU1 TUNI */ 54 { 17, 0, 8, 2 }, /* TMU1 TUNI */
@@ -70,25 +70,29 @@ static struct ipr_data sh7705_ipr_map[] = {
70}; 70};
71 71
72static unsigned long ipr_offsets[] = { 72static unsigned long ipr_offsets[] = {
73 0xFFFFFEE2 /* 0: IPRA */ 73 0xFFFFFEE2, /* 0: IPRA */
74, 0xFFFFFEE4 /* 1: IPRB */ 74 0xFFFFFEE4, /* 1: IPRB */
75, 0xA4000016 /* 2: IPRC */ 75 0xA4000016, /* 2: IPRC */
76, 0xA4000018 /* 3: IPRD */ 76 0xA4000018, /* 3: IPRD */
77, 0xA400001A /* 4: IPRE */ 77 0xA400001A, /* 4: IPRE */
78, 0xA4080000 /* 5: IPRF */ 78 0xA4080000, /* 5: IPRF */
79, 0xA4080002 /* 6: IPRG */ 79 0xA4080002, /* 6: IPRG */
80, 0xA4080004 /* 7: IPRH */ 80 0xA4080004, /* 7: IPRH */
81}; 81};
82 82
83/* given the IPR index return the address of the IPR register */ 83static struct ipr_desc ipr_irq_desc = {
84unsigned int map_ipridx_to_addr(int idx) 84 .ipr_offsets = ipr_offsets,
85{ 85 .nr_offsets = ARRAY_SIZE(ipr_offsets),
86 if (idx >= ARRAY_SIZE(ipr_offsets)) 86
87 return 0; 87 .ipr_data = ipr_irq_table,
88 return ipr_offsets[idx]; 88 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
89} 89
90 .chip = {
91 .name = "IPR-sh7705",
92 },
93};
90 94
91void __init init_IRQ_ipr() 95void __init init_IRQ_ipr(void)
92{ 96{
93 make_ipr_irq(sh7705_ipr_map, ARRAY_SIZE(sh7705_ipr_map)); 97 register_ipr_controller(&ipr_irq_desc);
94} 98}