sh: GUSA atomic rollback support.

This implements kernel-level atomic rollback built on top of gUSA,
as an alternative non-IRQ based atomicity method. This is generally
a faster method for platforms that are lacking the LL/SC pairs that
SH-4A and later use, and is only supportable on legacy cores.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 23 insertions, 1 deletions

diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 0d12a124055c..4004073f98cd 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -13,8 +13,9 @@
 #include <linux/linkage.h>
 #include <asm/asm-offsets.h>
 #include <asm/thread_info.h>
-#include <asm/cpu/mmu_context.h>
 #include <asm/unistd.h>
+#include <asm/cpu/mmu_context.h>
+#include <asm/page.h>
 
 ! NOTE:
 ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
@@ -409,6 +410,27 @@ ENTRY(handle_exception)
         ! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
         ! save all registers onto stack.
         !
+
+#ifdef CONFIG_GUSA
+        ! Check for roll back gRB (User and Kernel)
+        mov     r15, k0
+        shll    k0
+        bf/s    1f
+         shll   k0
+        bf/s    1f
+         stc    spc, k1
+        stc     r0_bank, k0
+        cmp/hs  k0, k1          ! test k1 (saved PC) >= k0 (saved r0)
+        bt/s    2f
+         stc    r1_bank, k1
+
+        add     #-2, k0
+        add     r15, k0
+        ldc     k0, spc         ! PC = saved r0 + r15 - 2
+2:      mov     k1, r15         ! SP = r1
+1:
+#endif
+
         stc     ssr, k0         ! Is it from kernel space?
         shll    k0              ! Check MD bit (bit30) by shifting it into...
         shll    k0              !       ...the T bit