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author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2012-04-12 23:14:03 -0400 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2012-04-17 03:17:33 -0400 |
commit | e00e7cb3b70e8aec5aa732b51394b841c7b4b571 (patch) | |
tree | 477dbda2ab334a1c727cb5a2d4d82099daaeb2d2 /arch/sh/kernel/cpu/sh2a/setup-sh7201.c | |
parent | 545f3bcf32b6d43d9ac89998e9e72fcdf7accca3 (diff) |
sh: sh2: Change the specification method of IRQ to SCIx_IRQ_MUXED
Some SCIF devices specify the same IRQ. We can use SCIx_IRQ_MUXED for this.
This is correction to the SH2/SH2A series.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a/setup-sh7201.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/setup-sh7201.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c index 9df558dcdb86..7b84785b8962 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c | |||
@@ -183,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
183 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 183 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
184 | .scbrr_algo_id = SCBRR_ALGO_2, | 184 | .scbrr_algo_id = SCBRR_ALGO_2, |
185 | .type = PORT_SCIF, | 185 | .type = PORT_SCIF, |
186 | .irqs = { 180, 180, 180, 180 } | 186 | .irqs = SCIx_IRQ_MUXED(180), |
187 | }; | 187 | }; |
188 | 188 | ||
189 | static struct platform_device scif0_device = { | 189 | static struct platform_device scif0_device = { |
@@ -200,7 +200,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
200 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 200 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
201 | .scbrr_algo_id = SCBRR_ALGO_2, | 201 | .scbrr_algo_id = SCBRR_ALGO_2, |
202 | .type = PORT_SCIF, | 202 | .type = PORT_SCIF, |
203 | .irqs = { 184, 184, 184, 184 } | 203 | .irqs = SCIx_IRQ_MUXED(184), |
204 | }; | 204 | }; |
205 | 205 | ||
206 | static struct platform_device scif1_device = { | 206 | static struct platform_device scif1_device = { |
@@ -217,7 +217,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
217 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 217 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
218 | .scbrr_algo_id = SCBRR_ALGO_2, | 218 | .scbrr_algo_id = SCBRR_ALGO_2, |
219 | .type = PORT_SCIF, | 219 | .type = PORT_SCIF, |
220 | .irqs = { 188, 188, 188, 188 } | 220 | .irqs = SCIx_IRQ_MUXED(188), |
221 | }; | 221 | }; |
222 | 222 | ||
223 | static struct platform_device scif2_device = { | 223 | static struct platform_device scif2_device = { |
@@ -234,7 +234,7 @@ static struct plat_sci_port scif3_platform_data = { | |||
234 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 234 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
235 | .scbrr_algo_id = SCBRR_ALGO_2, | 235 | .scbrr_algo_id = SCBRR_ALGO_2, |
236 | .type = PORT_SCIF, | 236 | .type = PORT_SCIF, |
237 | .irqs = { 192, 192, 192, 192 } | 237 | .irqs = SCIx_IRQ_MUXED(192), |
238 | }; | 238 | }; |
239 | 239 | ||
240 | static struct platform_device scif3_device = { | 240 | static struct platform_device scif3_device = { |
@@ -251,7 +251,7 @@ static struct plat_sci_port scif4_platform_data = { | |||
251 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 251 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
252 | .scbrr_algo_id = SCBRR_ALGO_2, | 252 | .scbrr_algo_id = SCBRR_ALGO_2, |
253 | .type = PORT_SCIF, | 253 | .type = PORT_SCIF, |
254 | .irqs = { 196, 196, 196, 196 } | 254 | .irqs = SCIx_IRQ_MUXED(196), |
255 | }; | 255 | }; |
256 | 256 | ||
257 | static struct platform_device scif4_device = { | 257 | static struct platform_device scif4_device = { |
@@ -268,7 +268,7 @@ static struct plat_sci_port scif5_platform_data = { | |||
268 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 268 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
269 | .scbrr_algo_id = SCBRR_ALGO_2, | 269 | .scbrr_algo_id = SCBRR_ALGO_2, |
270 | .type = PORT_SCIF, | 270 | .type = PORT_SCIF, |
271 | .irqs = { 200, 200, 200, 200 } | 271 | .irqs = SCIx_IRQ_MUXED(200), |
272 | }; | 272 | }; |
273 | 273 | ||
274 | static struct platform_device scif5_device = { | 274 | static struct platform_device scif5_device = { |
@@ -285,7 +285,7 @@ static struct plat_sci_port scif6_platform_data = { | |||
285 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 285 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
286 | .scbrr_algo_id = SCBRR_ALGO_2, | 286 | .scbrr_algo_id = SCBRR_ALGO_2, |
287 | .type = PORT_SCIF, | 287 | .type = PORT_SCIF, |
288 | .irqs = { 204, 204, 204, 204 } | 288 | .irqs = SCIx_IRQ_MUXED(204), |
289 | }; | 289 | }; |
290 | 290 | ||
291 | static struct platform_device scif6_device = { | 291 | static struct platform_device scif6_device = { |
@@ -302,7 +302,7 @@ static struct plat_sci_port scif7_platform_data = { | |||
302 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 302 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
303 | .scbrr_algo_id = SCBRR_ALGO_2, | 303 | .scbrr_algo_id = SCBRR_ALGO_2, |
304 | .type = PORT_SCIF, | 304 | .type = PORT_SCIF, |
305 | .irqs = { 208, 208, 208, 208 } | 305 | .irqs = SCIx_IRQ_MUXED(208), |
306 | }; | 306 | }; |
307 | 307 | ||
308 | static struct platform_device scif7_device = { | 308 | static struct platform_device scif7_device = { |