diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-27 11:49:07 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-27 11:49:07 -0400 |
commit | b98adfccdf5f8dd34ae56a2d5adbe2c030bd4674 (patch) | |
tree | 1807a029520f550dd4f90c95ad0063bceb00d645 /arch/sh/kernel/cpu/irq/ipr.c | |
parent | ba21fe71725f94792330ebc3034ef2b35a36276f (diff) | |
parent | 33573c0e3243aaa38b6ad96942de85a1b713c2ff (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (108 commits)
sh: Fix occasional flush_cache_4096() stack corruption.
sh: Calculate shm alignment at runtime.
sh: dma-mapping compile fixes.
sh: Initial vsyscall page support.
sh: Clean up PAGE_SIZE definition for assembly use.
sh: Selective flush_cache_mm() flushing.
sh: More intelligent entry_mask/way_size calculation.
sh: Support for L2 cache on newer SH-4A CPUs.
sh: Update kexec support for API changes.
sh: Optimized readsl()/writesl() support.
sh: Report movli.l/movco.l capabilities.
sh: CPU flags in AT_HWCAP in ELF auxvt.
sh: Add support for 4K stacks.
sh: Enable /proc/kcore support.
sh: stack debugging support.
sh: select CONFIG_EMBEDDED.
sh: machvec rework.
sh: Solution Engine SH7343 board support.
sh: SH7710VoIPGW board support.
sh: Enable verbose BUG() support.
...
Diffstat (limited to 'arch/sh/kernel/cpu/irq/ipr.c')
-rw-r--r-- | arch/sh/kernel/cpu/irq/ipr.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index 0f545941fb4f..f785822cd5de 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c | |||
@@ -57,31 +57,27 @@ static struct hw_interrupt_type ipr_irq_type = { | |||
57 | 57 | ||
58 | static void disable_ipr_irq(unsigned int irq) | 58 | static void disable_ipr_irq(unsigned int irq) |
59 | { | 59 | { |
60 | unsigned long val, flags; | 60 | unsigned long val; |
61 | unsigned int addr = ipr_data[irq].addr; | 61 | unsigned int addr = ipr_data[irq].addr; |
62 | unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift); | 62 | unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift); |
63 | 63 | ||
64 | /* Set the priority in IPR to 0 */ | 64 | /* Set the priority in IPR to 0 */ |
65 | local_irq_save(flags); | ||
66 | val = ctrl_inw(addr); | 65 | val = ctrl_inw(addr); |
67 | val &= mask; | 66 | val &= mask; |
68 | ctrl_outw(val, addr); | 67 | ctrl_outw(val, addr); |
69 | local_irq_restore(flags); | ||
70 | } | 68 | } |
71 | 69 | ||
72 | static void enable_ipr_irq(unsigned int irq) | 70 | static void enable_ipr_irq(unsigned int irq) |
73 | { | 71 | { |
74 | unsigned long val, flags; | 72 | unsigned long val; |
75 | unsigned int addr = ipr_data[irq].addr; | 73 | unsigned int addr = ipr_data[irq].addr; |
76 | int priority = ipr_data[irq].priority; | 74 | int priority = ipr_data[irq].priority; |
77 | unsigned short value = (priority << ipr_data[irq].shift); | 75 | unsigned short value = (priority << ipr_data[irq].shift); |
78 | 76 | ||
79 | /* Set priority in IPR back to original value */ | 77 | /* Set priority in IPR back to original value */ |
80 | local_irq_save(flags); | ||
81 | val = ctrl_inw(addr); | 78 | val = ctrl_inw(addr); |
82 | val |= value; | 79 | val |= value; |
83 | ctrl_outw(val, addr); | 80 | ctrl_outw(val, addr); |
84 | local_irq_restore(flags); | ||
85 | } | 81 | } |
86 | 82 | ||
87 | static void mask_and_ack_ipr(unsigned int irq) | 83 | static void mask_and_ack_ipr(unsigned int irq) |
@@ -89,6 +85,7 @@ static void mask_and_ack_ipr(unsigned int irq) | |||
89 | disable_ipr_irq(irq); | 85 | disable_ipr_irq(irq); |
90 | 86 | ||
91 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | 87 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ |
88 | defined(CONFIG_CPU_SUBTYPE_SH7706) || \ | ||
92 | defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) | 89 | defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) |
93 | /* This is needed when we use edge triggered setting */ | 90 | /* This is needed when we use edge triggered setting */ |
94 | /* XXX: Is it really needed? */ | 91 | /* XXX: Is it really needed? */ |
@@ -123,7 +120,7 @@ void __init init_IRQ(void) | |||
123 | #ifndef CONFIG_CPU_SUBTYPE_SH7780 | 120 | #ifndef CONFIG_CPU_SUBTYPE_SH7780 |
124 | make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); | 121 | make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); |
125 | make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); | 122 | make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); |
126 | #if defined(CONFIG_SH_RTC) | 123 | #ifdef RTC_IRQ |
127 | make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); | 124 | make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); |
128 | #endif | 125 | #endif |
129 | 126 | ||
@@ -162,6 +159,7 @@ void __init init_IRQ(void) | |||
162 | #endif | 159 | #endif |
163 | 160 | ||
164 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | 161 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ |
162 | defined(CONFIG_CPU_SUBTYPE_SH7706) || \ | ||
165 | defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) | 163 | defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) |
166 | /* | 164 | /* |
167 | * Initialize the Interrupt Controller (INTC) | 165 | * Initialize the Interrupt Controller (INTC) |
@@ -192,6 +190,8 @@ void __init init_IRQ(void) | |||
192 | /* Perform the machine specific initialisation */ | 190 | /* Perform the machine specific initialisation */ |
193 | if (sh_mv.mv_init_irq != NULL) | 191 | if (sh_mv.mv_init_irq != NULL) |
194 | sh_mv.mv_init_irq(); | 192 | sh_mv.mv_init_irq(); |
193 | |||
194 | irq_ctx_init(smp_processor_id()); | ||
195 | } | 195 | } |
196 | 196 | ||
197 | #if !defined(CONFIG_CPU_HAS_PINT_IRQ) | 197 | #if !defined(CONFIG_CPU_HAS_PINT_IRQ) |