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authorPaul Mundt <lethal@linux-sh.org>2008-10-03 16:25:52 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-10-03 16:25:52 -0400
commit14866543ad22014a0b12e10657a917eb6b487248 (patch)
tree178f36abc7615347626ec28ee2bd0efffe5500ac /arch/sh/include
parentbc0f424faa11a2017ba725bb8c5fc481ece7b440 (diff)
sh: More I/O routine overhauling.
This tidies up a lot of the PIO/MMIO split. No in-tree platforms were making use of the MMIO overloading through the machvec (nor have any of them been in some time), so we just kill all of that off. The ISA I/O routine wrapping remains unaffected, which remains the only special casing outside of the iomap API that boards need to think about. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include')
-rw-r--r--arch/sh/include/asm/io.h257
-rw-r--r--arch/sh/include/asm/io_generic.h7
-rw-r--r--arch/sh/include/asm/machvec.h7
3 files changed, 96 insertions, 175 deletions
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index d9e794eff830..436c28539577 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -1,27 +1,26 @@
1#ifndef __ASM_SH_IO_H 1#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H 2#define __ASM_SH_IO_H
3
4/* 3/*
5 * Convention: 4 * Convention:
6 * read{b,w,l}/write{b,w,l} are for PCI, 5 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
7 * while in{b,w,l}/out{b,w,l} are for ISA 6 * while in{b,w,l}/out{b,w,l} are for ISA
8 * These may (will) be platform specific function. 7 *
9 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p 8 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p
10 * and 'string' versions: ins{b,w,l}/outs{b,w,l} 9 * and 'string' versions: ins{b,w,l}/outs{b,w,l}
11 * For read{b,w,l} and write{b,w,l} there are also __raw versions, which
12 * do not have a memory barrier after them.
13 * 10 *
14 * In addition, we have 11 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
15 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. 12 * automatically, there are also __raw versions, which do not.
16 * which are processor specific. 13 *
17 */ 14 * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
18 15 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
19/* 16 * these have the same semantics as the __raw variants, and as such, all
20 * We follow the Alpha convention here: 17 * new code should be using the __raw versions.
21 * __inb expands to an inline function call (which calls via the mv) 18 *
22 * _inb is a real function call (note ___raw fns are _ version of __raw) 19 * All ISA I/O routines are wrapped through the machine vector. If a
23 * inb by default expands to _inb, but the machine specific code may 20 * board does not provide overrides, a generic set that are copied in
24 * define it to __inb if it chooses. 21 * from the default machine vector are used instead. These are largely
22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days.
25 */ 24 */
26#include <asm/cache.h> 25#include <asm/cache.h>
27#include <asm/system.h> 26#include <asm/system.h>
@@ -31,7 +30,6 @@
31#include <asm-generic/iomap.h> 30#include <asm-generic/iomap.h>
32 31
33#ifdef __KERNEL__ 32#ifdef __KERNEL__
34
35/* 33/*
36 * Depending on which platform we are running on, we need different 34 * Depending on which platform we are running on, we need different
37 * I/O functions. 35 * I/O functions.
@@ -40,90 +38,64 @@
40#include <asm/io_generic.h> 38#include <asm/io_generic.h>
41#include <asm/io_trapped.h> 39#include <asm/io_trapped.h>
42 40
43#define maybebadio(port) \ 41#define inb(p) sh_mv.mv_inb((p))
44 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ 42#define inw(p) sh_mv.mv_inw((p))
45 __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0)) 43#define inl(p) sh_mv.mv_inl((p))
44#define outb(x,p) sh_mv.mv_outb((x),(p))
45#define outw(x,p) sh_mv.mv_outw((x),(p))
46#define outl(x,p) sh_mv.mv_outl((x),(p))
47
48#define inb_p(p) sh_mv.mv_inb_p((p))
49#define inw_p(p) sh_mv.mv_inw_p((p))
50#define inl_p(p) sh_mv.mv_inl_p((p))
51#define outb_p(x,p) sh_mv.mv_outb_p((x),(p))
52#define outw_p(x,p) sh_mv.mv_outw_p((x),(p))
53#define outl_p(x,p) sh_mv.mv_outl_p((x),(p))
54
55#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
56#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
57#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
58#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
59#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
60#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
61
62#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
63#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
64#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
65#define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
66
67#define __raw_readb(a) (__chk_io_ptr(a), *(volatile u8 __force *)(a))
68#define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a))
69#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
70#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a))
71
72#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; })
73#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; })
74#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; })
75#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; })
76
77#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
78#define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
46 81
47/* 82/* SuperH on-chip I/O functions */
48 * Since boards are able to define their own set of I/O routines through 83#define ctrl_inb __raw_readb
49 * their respective machine vector, we always wrap through the mv. 84#define ctrl_inw __raw_readw
50 * 85#define ctrl_inl __raw_readl
51 * Also, in the event that a board hasn't provided its own definition for 86#define ctrl_inq __raw_readq
52 * a given routine, it will be wrapped to generic code at run-time.
53 */
54
55#define __inb(p) sh_mv.mv_inb((p))
56#define __inw(p) sh_mv.mv_inw((p))
57#define __inl(p) sh_mv.mv_inl((p))
58#define __outb(x,p) sh_mv.mv_outb((x),(p))
59#define __outw(x,p) sh_mv.mv_outw((x),(p))
60#define __outl(x,p) sh_mv.mv_outl((x),(p))
61
62#define __inb_p(p) sh_mv.mv_inb_p((p))
63#define __inw_p(p) sh_mv.mv_inw_p((p))
64#define __inl_p(p) sh_mv.mv_inl_p((p))
65#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
66#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
67#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
68
69#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
70#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
71#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
72#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
73#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
74#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
75
76#define __readb(a) sh_mv.mv_readb((a))
77#define __readw(a) sh_mv.mv_readw((a))
78#define __readl(a) sh_mv.mv_readl((a))
79#define __writeb(v,a) sh_mv.mv_writeb((v),(a))
80#define __writew(v,a) sh_mv.mv_writew((v),(a))
81#define __writel(v,a) sh_mv.mv_writel((v),(a))
82
83#define inb __inb
84#define inw __inw
85#define inl __inl
86#define outb __outb
87#define outw __outw
88#define outl __outl
89
90#define inb_p __inb_p
91#define inw_p __inw_p
92#define inl_p __inl_p
93#define outb_p __outb_p
94#define outw_p __outw_p
95#define outl_p __outl_p
96
97#define insb __insb
98#define insw __insw
99#define insl __insl
100#define outsb __outsb
101#define outsw __outsw
102#define outsl __outsl
103
104#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
105#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
106#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))
107
108#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
109#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
110#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
111
112void __raw_writesl(void __iomem *addr, const void *data, int longlen);
113void __raw_readsl(const void __iomem *addr, void *data, int longlen);
114 87
115/* 88#define ctrl_outb __raw_writeb
116 * The platform header files may define some of these macros to use 89#define ctrl_outw __raw_writew
117 * the inlined versions where appropriate. These macros may also be 90#define ctrl_outl __raw_writel
118 * redefined by userlevel programs. 91#define ctrl_outq __raw_writeq
119 */
120#define readb(a) ({ unsigned int r_ = __readb(a); mb(); r_; })
121#define readw(a) ({ unsigned int r_ = __readw(a); mb(); r_; })
122#define readl(a) ({ unsigned int r_ = __readl(a); mb(); r_; })
123 92
124#define writeb(v,a) ({ __writeb((v),(a)); mb(); }) 93static inline void ctrl_delay(void)
125#define writew(v,a) ({ __writew((v),(a)); mb(); }) 94{
126#define writel(v,a) ({ __writel((v),(a)); mb(); }) 95#ifdef P2SEG
96 __raw_readw(P2SEG);
97#endif
98}
127 99
128#define __BUILD_MEMORY_STRING(bwlq, type) \ 100#define __BUILD_MEMORY_STRING(bwlq, type) \
129 \ 101 \
@@ -151,18 +123,23 @@ static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
151 123
152__BUILD_MEMORY_STRING(b, u8) 124__BUILD_MEMORY_STRING(b, u8)
153__BUILD_MEMORY_STRING(w, u16) 125__BUILD_MEMORY_STRING(w, u16)
126__BUILD_MEMORY_STRING(q, u64)
127
128void __raw_writesl(void __iomem *addr, const void *data, int longlen);
129void __raw_readsl(const void __iomem *addr, void *data, int longlen);
154 130
155#define writesb __raw_writesb 131#define writesb __raw_writesb
156#define writesw __raw_writesw 132#define writesw __raw_writesw
157#define writesl __raw_writesl 133#define writesl __raw_writesl
158 134
159#define readsb __raw_readsb 135#define readsb __raw_readsb
160#define readsw __raw_readsw 136#define readsw __raw_readsw
161#define readsl __raw_readsl 137#define readsl __raw_readsl
162 138
163#define readb_relaxed(a) readb(a) 139#define readb_relaxed(a) readb(a)
164#define readw_relaxed(a) readw(a) 140#define readw_relaxed(a) readw(a)
165#define readl_relaxed(a) readl(a) 141#define readl_relaxed(a) readl(a)
142#define readq_relaxed(a) readq(a)
166 143
167/* Simple MMIO */ 144/* Simple MMIO */
168#define ioread8(a) __raw_readb(a) 145#define ioread8(a) __raw_readb(a)
@@ -185,15 +162,17 @@ __BUILD_MEMORY_STRING(w, u16)
185#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c)) 162#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
186#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c)) 163#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
187 164
188#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ 165/* synco on SH-4A, otherwise a nop */
166#define mmiowb() wmb()
189 167
190#define IO_SPACE_LIMIT 0xffffffff 168#define IO_SPACE_LIMIT 0xffffffff
191 169
192extern unsigned long generic_io_base; 170extern unsigned long generic_io_base;
193 171
194/* 172/*
195 * This function provides a method for the generic case where a board-specific 173 * This function provides a method for the generic case where a
196 * ioport_map simply needs to return the port + some arbitrary port base. 174 * board-specific ioport_map simply needs to return the port + some
175 * arbitrary port base.
197 * 176 *
198 * We use this at board setup time to implicitly set the port base, and 177 * We use this at board setup time to implicitly set the port base, and
199 * as a result, we can use the generic ioport_map. 178 * as a result, we can use the generic ioport_map.
@@ -206,57 +185,9 @@ static inline void __set_io_port_base(unsigned long pbase)
206#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) 185#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
207 186
208/* We really want to try and get these to memcpy etc */ 187/* We really want to try and get these to memcpy etc */
209extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); 188void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
210extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); 189void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
211extern void memset_io(volatile void __iomem *, int, unsigned long); 190void memset_io(volatile void __iomem *, int, unsigned long);
212
213/* SuperH on-chip I/O functions */
214static inline unsigned char ctrl_inb(unsigned long addr)
215{
216 return *(volatile unsigned char*)addr;
217}
218
219static inline unsigned short ctrl_inw(unsigned long addr)
220{
221 return *(volatile unsigned short*)addr;
222}
223
224static inline unsigned int ctrl_inl(unsigned long addr)
225{
226 return *(volatile unsigned long*)addr;
227}
228
229static inline unsigned long long ctrl_inq(unsigned long addr)
230{
231 return *(volatile unsigned long long*)addr;
232}
233
234static inline void ctrl_outb(unsigned char b, unsigned long addr)
235{
236 *(volatile unsigned char*)addr = b;
237}
238
239static inline void ctrl_outw(unsigned short b, unsigned long addr)
240{
241 *(volatile unsigned short*)addr = b;
242}
243
244static inline void ctrl_outl(unsigned int b, unsigned long addr)
245{
246 *(volatile unsigned long*)addr = b;
247}
248
249static inline void ctrl_outq(unsigned long long b, unsigned long addr)
250{
251 *(volatile unsigned long long*)addr = b;
252}
253
254static inline void ctrl_delay(void)
255{
256#ifdef P2SEG
257 ctrl_inw(P2SEG);
258#endif
259}
260 191
261/* Quad-word real-mode I/O, don't ask.. */ 192/* Quad-word real-mode I/O, don't ask.. */
262unsigned long long peek_real_address_q(unsigned long long addr); 193unsigned long long peek_real_address_q(unsigned long long addr);
@@ -347,6 +278,10 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
347#define iounmap(addr) \ 278#define iounmap(addr) \
348 __iounmap((addr)) 279 __iounmap((addr))
349 280
281#define maybebadio(port) \
282 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
283 __func__, __LINE__, (port), (u32)__builtin_return_address(0))
284
350/* 285/*
351 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 286 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
352 * access 287 * access
diff --git a/arch/sh/include/asm/io_generic.h b/arch/sh/include/asm/io_generic.h
index 92fc6070d7b3..1e5d375f55dc 100644
--- a/arch/sh/include/asm/io_generic.h
+++ b/arch/sh/include/asm/io_generic.h
@@ -33,13 +33,6 @@ void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long
33void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); 33void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count);
34void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); 34void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count);
35 35
36u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *);
37u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *);
38u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *);
39void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *);
40void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *);
41void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *);
42
43void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); 36void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size);
44void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); 37void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr);
45 38
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index b2e4124070ae..f1bae02ef7b6 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -42,13 +42,6 @@ struct sh_machine_vector {
42 void (*mv_outsw)(unsigned long, const void *src, unsigned long count); 42 void (*mv_outsw)(unsigned long, const void *src, unsigned long count);
43 void (*mv_outsl)(unsigned long, const void *src, unsigned long count); 43 void (*mv_outsl)(unsigned long, const void *src, unsigned long count);
44 44
45 u8 (*mv_readb)(void __iomem *);
46 u16 (*mv_readw)(void __iomem *);
47 u32 (*mv_readl)(void __iomem *);
48 void (*mv_writeb)(u8, void __iomem *);
49 void (*mv_writew)(u16, void __iomem *);
50 void (*mv_writel)(u32, void __iomem *);
51
52 int (*mv_irq_demux)(int irq); 45 int (*mv_irq_demux)(int irq);
53 46
54 void (*mv_init_irq)(void); 47 void (*mv_init_irq)(void);