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authorPaul Mundt <lethal@linux-sh.org>2009-08-14 23:38:29 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-08-14 23:38:29 -0400
commita58e1a2ab4f6334c50dfbda83d3a5c6e0b2b4bee (patch)
tree6c9470da2d4da8579ca534a6037da193c74cc9cd /arch/sh/include/cpu-sh2a
parent109b44a82a7a8ae32d7fb257480f92f2d96f0daf (diff)
sh: Convert SH-2A to new cacheflush interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh2a')
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/cacheflush.h30
1 files changed, 0 insertions, 30 deletions
diff --git a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h b/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
deleted file mode 100644
index 32a529187a38..000000000000
--- a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef __ASM_CPU_SH2A_CACHEFLUSH_H
2#define __ASM_CPU_SH2A_CACHEFLUSH_H
3
4/*
5 * Cache flushing:
6 *
7 * - flush_cache_all() flushes entire cache
8 * - flush_cache_mm(mm) flushes the specified mm context's cache lines
9 * - flush_cache_dup mm(mm) handles cache flushing when forking
10 * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
11 * - flush_cache_range(vma, start, end) flushes a range of pages
12 *
13 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
14 * - flush_icache_range(start, end) flushes(invalidates) a range for icache
15 * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
16 *
17 * Caches are indexed (effectively) by physical address on SH-2, so
18 * we don't need them.
19 */
20#define flush_cache_all() do { } while (0)
21#define flush_cache_mm(mm) do { } while (0)
22#define flush_cache_dup_mm(mm) do { } while (0)
23#define flush_cache_range(vma, start, end) do { } while (0)
24#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
25#define flush_dcache_page(page) do { } while (0)
26void flush_icache_range(unsigned long start, unsigned long end);
27#define flush_icache_page(vma,pg) do { } while (0)
28#define flush_cache_sigtramp(vaddr) do { } while (0)
29
30#endif /* __ASM_CPU_SH2A_CACHEFLUSH_H */