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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-11 10:14:01 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-11 10:14:01 -0400
commitc7a19c795b4b0a3232c157ed29eea85077e95da6 (patch)
treed3916dcdea74b55453694c9f31b95b6d906e3202 /arch/sh/include/asm
parent5fd41f2a10b38ab84b4c2436140ce490d34291fa (diff)
parenta0bbe990c161ddf56444efe80d9d6e15fdc47aca (diff)
Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dma updates from Vinod Koul: "Some notable changes are: - new driver for AMBA AXI NBPF by Guennadi - new driver for sun6i controller by Maxime - pl330 drivers fixes from Lar's - sh-dma updates and fixes from Laurent, Geert and Kuninori - Documentation updates from Geert - drivers fixes and updates spread over dw, edma, freescale, mpc512x etc.." * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (72 commits) dmaengine: sun6i: depends on RESET_CONTROLLER dma: at_hdmac: fix invalid remaining bytes detection dmaengine: nbpfaxi: don't build this driver where it cannot be used dmaengine: nbpf_error_get_channel() can be static dma: pl08x: Use correct specifier for size_t values dmaengine: Remove the context argument to the prep_dma_cyclic operation dmaengine: nbpfaxi: convert to tasklet dmaengine: nbpfaxi: fix a theoretical race dmaengine: add a driver for AMBA AXI NBPF DMAC IP cores dmaengine: add device tree binding documentation for the nbpfaxi driver dmaengine: edma: Do not register second device when booted with DT dmaengine: edma: Do not change the error code returned from edma_alloc_slot dmaengine: rcar-dmac: Add device tree bindings documentation dmaengine: shdma: Allocate cyclic sg list dynamically dmaengine: shdma: Make channel filter ignore unrelated devices dmaengine: sh: Rework Kconfig and Makefile dmaengine: sun6i: Fix memory leaks dmaengine: sun6i: Free the interrupt before killing the tasklet dmaengine: sun6i: Remove switch statement from buswidth convertion routine dmaengine: of: kconfig: select DMA_ENGINE when DMA_OF is selected ...
Diffstat (limited to 'arch/sh/include/asm')
-rw-r--r--arch/sh/include/asm/dma-register.h36
1 files changed, 19 insertions, 17 deletions
diff --git a/arch/sh/include/asm/dma-register.h b/arch/sh/include/asm/dma-register.h
index 51cd78feacff..c757b47e6b64 100644
--- a/arch/sh/include/asm/dma-register.h
+++ b/arch/sh/include/asm/dma-register.h
@@ -13,17 +13,17 @@
13#ifndef DMA_REGISTER_H 13#ifndef DMA_REGISTER_H
14#define DMA_REGISTER_H 14#define DMA_REGISTER_H
15 15
16/* DMA register */ 16/* DMA registers */
17#define SAR 0x00 17#define SAR 0x00 /* Source Address Register */
18#define DAR 0x04 18#define DAR 0x04 /* Destination Address Register */
19#define TCR 0x08 19#define TCR 0x08 /* Transfer Count Register */
20#define CHCR 0x0C 20#define CHCR 0x0C /* Channel Control Register */
21#define DMAOR 0x40 21#define DMAOR 0x40 /* DMA Operation Register */
22 22
23/* DMAOR definitions */ 23/* DMAOR definitions */
24#define DMAOR_AE 0x00000004 24#define DMAOR_AE 0x00000004 /* Address Error Flag */
25#define DMAOR_NMIF 0x00000002 25#define DMAOR_NMIF 0x00000002
26#define DMAOR_DME 0x00000001 26#define DMAOR_DME 0x00000001 /* DMA Master Enable */
27 27
28/* Definitions for the SuperH DMAC */ 28/* Definitions for the SuperH DMAC */
29#define REQ_L 0x00000000 29#define REQ_L 0x00000000
@@ -34,18 +34,20 @@
34#define ACK_W 0x00020000 34#define ACK_W 0x00020000
35#define ACK_H 0x00000000 35#define ACK_H 0x00000000
36#define ACK_L 0x00010000 36#define ACK_L 0x00010000
37#define DM_INC 0x00004000 37#define DM_INC 0x00004000 /* Destination addresses are incremented */
38#define DM_DEC 0x00008000 38#define DM_DEC 0x00008000 /* Destination addresses are decremented */
39#define DM_FIX 0x0000c000 39#define DM_FIX 0x0000c000 /* Destination address is fixed */
40#define SM_INC 0x00001000 40#define SM_INC 0x00001000 /* Source addresses are incremented */
41#define SM_DEC 0x00002000 41#define SM_DEC 0x00002000 /* Source addresses are decremented */
42#define SM_FIX 0x00003000 42#define SM_FIX 0x00003000 /* Source address is fixed */
43#define RS_IN 0x00000200 43#define RS_IN 0x00000200
44#define RS_OUT 0x00000300 44#define RS_OUT 0x00000300
45#define RS_AUTO 0x00000400 /* Auto Request */
46#define RS_ERS 0x00000800 /* DMA extended resource selector */
45#define TS_BLK 0x00000040 47#define TS_BLK 0x00000040
46#define TM_BUR 0x00000020 48#define TM_BUR 0x00000020
47#define CHCR_DE 0x00000001 49#define CHCR_DE 0x00000001 /* DMA Enable */
48#define CHCR_TE 0x00000002 50#define CHCR_TE 0x00000002 /* Transfer End Flag */
49#define CHCR_IE 0x00000004 51#define CHCR_IE 0x00000004 /* Interrupt Enable */
50 52
51#endif 53#endif