diff options
author | Paul Mundt <lethal@linux-sh.org> | 2009-08-15 12:50:17 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-15 12:50:17 -0400 |
commit | 94ecd224c940830e2f2724c3860eb7fb74c15d31 (patch) | |
tree | b3940834bc26796af862acf1a24810a2d0d865c9 /arch/sh/include/asm | |
parent | 1ee4ab09f38b77b3a5750429d456d6606b237924 (diff) |
sh: Fix up the SH-5 build with caches enabled.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm')
-rw-r--r-- | arch/sh/include/asm/system.h | 14 | ||||
-rw-r--r-- | arch/sh/include/asm/system_32.h | 10 | ||||
-rw-r--r-- | arch/sh/include/asm/system_64.h | 5 |
3 files changed, 16 insertions, 13 deletions
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index ab79e1f4fbe0..bf7c4cbde372 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h | |||
@@ -14,18 +14,6 @@ | |||
14 | 14 | ||
15 | #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ | 15 | #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ |
16 | 16 | ||
17 | #if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) | ||
18 | #define __icbi() \ | ||
19 | { \ | ||
20 | unsigned long __addr; \ | ||
21 | __addr = 0xa8000000; \ | ||
22 | __asm__ __volatile__( \ | ||
23 | "icbi %0\n\t" \ | ||
24 | : /* no output */ \ | ||
25 | : "m" (__m(__addr))); \ | ||
26 | } | ||
27 | #endif | ||
28 | |||
29 | /* | 17 | /* |
30 | * A brief note on ctrl_barrier(), the control register write barrier. | 18 | * A brief note on ctrl_barrier(), the control register write barrier. |
31 | * | 19 | * |
@@ -44,7 +32,7 @@ | |||
44 | #define mb() __asm__ __volatile__ ("synco": : :"memory") | 32 | #define mb() __asm__ __volatile__ ("synco": : :"memory") |
45 | #define rmb() mb() | 33 | #define rmb() mb() |
46 | #define wmb() __asm__ __volatile__ ("synco": : :"memory") | 34 | #define wmb() __asm__ __volatile__ ("synco": : :"memory") |
47 | #define ctrl_barrier() __icbi() | 35 | #define ctrl_barrier() __icbi(0xa8000000) |
48 | #define read_barrier_depends() do { } while(0) | 36 | #define read_barrier_depends() do { } while(0) |
49 | #else | 37 | #else |
50 | #define mb() __asm__ __volatile__ ("": : :"memory") | 38 | #define mb() __asm__ __volatile__ ("": : :"memory") |
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h index d7299d69ff79..5ddd2359f3ef 100644 --- a/arch/sh/include/asm/system_32.h +++ b/arch/sh/include/asm/system_32.h | |||
@@ -63,6 +63,16 @@ do { \ | |||
63 | #define __restore_dsp(tsk) do { } while (0) | 63 | #define __restore_dsp(tsk) do { } while (0) |
64 | #endif | 64 | #endif |
65 | 65 | ||
66 | #if defined(CONFIG_CPU_SH4A) | ||
67 | #define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr)) | ||
68 | #else | ||
69 | #define __icbi(addr) mb() | ||
70 | #endif | ||
71 | |||
72 | #define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr)) | ||
73 | #define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr)) | ||
74 | #define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr)) | ||
75 | |||
66 | struct task_struct *__switch_to(struct task_struct *prev, | 76 | struct task_struct *__switch_to(struct task_struct *prev, |
67 | struct task_struct *next); | 77 | struct task_struct *next); |
68 | 78 | ||
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h index 218b54d9d660..8e4a03e7966c 100644 --- a/arch/sh/include/asm/system_64.h +++ b/arch/sh/include/asm/system_64.h | |||
@@ -37,6 +37,11 @@ do { \ | |||
37 | #define jump_to_uncached() do { } while (0) | 37 | #define jump_to_uncached() do { } while (0) |
38 | #define back_to_cached() do { } while (0) | 38 | #define back_to_cached() do { } while (0) |
39 | 39 | ||
40 | #define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) | ||
41 | #define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) | ||
42 | #define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) | ||
43 | #define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) | ||
44 | |||
40 | static inline reg_size_t register_align(void *val) | 45 | static inline reg_size_t register_align(void *val) |
41 | { | 46 | { |
42 | return (unsigned long long)(signed long long)(signed long)val; | 47 | return (unsigned long long)(signed long long)(signed long)val; |