Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

1 files changed, 41 insertions, 3 deletions

diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 607d413f6168..51296b36770e 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -2,6 +2,7 @@
 #define __ASM_SH_SYSTEM_32_H
 
 #include <linux/types.h>
+#include <asm/mmu.h>
 
 #ifdef CONFIG_SH_DSP
 
@@ -144,9 +145,6 @@ do {								\
                 __restore_dsp(prev);                            \
 } while (0)
 
-#define __uses_jump_to_uncached \
-        noinline __attribute__ ((__section__ (".uncached.text")))
-
 /*
  * Jump to uncached area.
  * When handling TLB or caches, we need to do it from an uncached area.
@@ -216,6 +214,17 @@ static inline reg_size_t register_align(void *val)
 int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
                             struct mem_access *ma, int);
 
+static inline void trigger_address_error(void)
+{
+        if (__in_29bit_mode())
+                __asm__ __volatile__ (
+                        "ldc %0, sr\n\t"
+                        "mov.l @%1, %0"
+                        :
+                        : "r" (0x10000000), "r" (0x80000001)
+                );
+}
+
 asmlinkage void do_address_error(struct pt_regs *regs,
                                  unsigned long writeaccess,
                                  unsigned long address);
@@ -232,4 +241,33 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
                                    unsigned long r6, unsigned long r7,
                                    struct pt_regs __regs);
 
+static inline void set_bl_bit(void)
+{
+        unsigned long __dummy0, __dummy1;
+
+        __asm__ __volatile__ (
+                "stc    sr, %0\n\t"
+                "or     %2, %0\n\t"
+                "and    %3, %0\n\t"
+                "ldc    %0, sr\n\t"
+                : "=&r" (__dummy0), "=r" (__dummy1)
+                : "r" (0x10000000), "r" (0xffffff0f)
+                : "memory"
+        );
+}
+
+static inline void clear_bl_bit(void)
+{
+        unsigned long __dummy0, __dummy1;
+
+        __asm__ __volatile__ (
+                "stc    sr, %0\n\t"
+                "and    %2, %0\n\t"
+                "ldc    %0, sr\n\t"
+                : "=&r" (__dummy0), "=r" (__dummy1)
+                : "1" (~0x10000000)
+                : "memory"
+        );
+}
+
 #endif /* __ASM_SH_SYSTEM_32_H */