diff options
author | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
---|---|---|
committer | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
commit | ada47b5fe13d89735805b566185f4885f5a3f750 (patch) | |
tree | 644b88f8a71896307d71438e9b3af49126ffb22b /arch/sh/include/asm/pgtable.h | |
parent | 43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff) | |
parent | 3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff) |
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/sh/include/asm/pgtable.h')
-rw-r--r-- | arch/sh/include/asm/pgtable.h | 55 |
1 files changed, 31 insertions, 24 deletions
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h index 4f3efa7d5a64..02f77450cd8f 100644 --- a/arch/sh/include/asm/pgtable.h +++ b/arch/sh/include/asm/pgtable.h | |||
@@ -12,7 +12,11 @@ | |||
12 | #ifndef __ASM_SH_PGTABLE_H | 12 | #ifndef __ASM_SH_PGTABLE_H |
13 | #define __ASM_SH_PGTABLE_H | 13 | #define __ASM_SH_PGTABLE_H |
14 | 14 | ||
15 | #include <asm-generic/pgtable-nopmd.h> | 15 | #ifdef CONFIG_X2TLB |
16 | #include <asm/pgtable-3level.h> | ||
17 | #else | ||
18 | #include <asm/pgtable-2level.h> | ||
19 | #endif | ||
16 | #include <asm/page.h> | 20 | #include <asm/page.h> |
17 | 21 | ||
18 | #ifndef __ASSEMBLY__ | 22 | #ifndef __ASSEMBLY__ |
@@ -51,37 +55,39 @@ static inline unsigned long long neff_sign_extend(unsigned long val) | |||
51 | #define NPHYS_SIGN (1LL << (NPHYS - 1)) | 55 | #define NPHYS_SIGN (1LL << (NPHYS - 1)) |
52 | #define NPHYS_MASK (-1LL << NPHYS) | 56 | #define NPHYS_MASK (-1LL << NPHYS) |
53 | 57 | ||
54 | /* | ||
55 | * traditional two-level paging structure | ||
56 | */ | ||
57 | /* PTE bits */ | ||
58 | #if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64) | ||
59 | # define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ | ||
60 | #else | ||
61 | # define PTE_MAGNITUDE 2 /* 32-bit PTEs */ | ||
62 | #endif | ||
63 | #define PTE_SHIFT PAGE_SHIFT | ||
64 | #define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE) | ||
65 | |||
66 | /* PGD bits */ | ||
67 | #define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS) | ||
68 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | 58 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) |
69 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | 59 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) |
70 | 60 | ||
71 | /* Entries per level */ | 61 | /* Entries per level */ |
72 | #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) | 62 | #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) |
73 | #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) | ||
74 | 63 | ||
75 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) | ||
76 | #define FIRST_USER_ADDRESS 0 | 64 | #define FIRST_USER_ADDRESS 0 |
77 | 65 | ||
78 | #ifdef CONFIG_32BIT | 66 | #define PHYS_ADDR_MASK29 0x1fffffff |
79 | #define PHYS_ADDR_MASK 0xffffffff | 67 | #define PHYS_ADDR_MASK32 0xffffffff |
68 | |||
69 | #ifdef CONFIG_PMB | ||
70 | static inline unsigned long phys_addr_mask(void) | ||
71 | { | ||
72 | /* Is the MMU in 29bit mode? */ | ||
73 | if (__in_29bit_mode()) | ||
74 | return PHYS_ADDR_MASK29; | ||
75 | |||
76 | return PHYS_ADDR_MASK32; | ||
77 | } | ||
78 | #elif defined(CONFIG_32BIT) | ||
79 | static inline unsigned long phys_addr_mask(void) | ||
80 | { | ||
81 | return PHYS_ADDR_MASK32; | ||
82 | } | ||
80 | #else | 83 | #else |
81 | #define PHYS_ADDR_MASK 0x1fffffff | 84 | static inline unsigned long phys_addr_mask(void) |
85 | { | ||
86 | return PHYS_ADDR_MASK29; | ||
87 | } | ||
82 | #endif | 88 | #endif |
83 | 89 | ||
84 | #define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) | 90 | #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) |
85 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) | 91 | #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) |
86 | 92 | ||
87 | #ifdef CONFIG_SUPERH32 | 93 | #ifdef CONFIG_SUPERH32 |
@@ -135,9 +141,9 @@ typedef pte_t *pte_addr_t; | |||
135 | #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) | 141 | #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) |
136 | 142 | ||
137 | /* | 143 | /* |
138 | * No page table caches to initialise | 144 | * Initialise the page table caches |
139 | */ | 145 | */ |
140 | #define pgtable_cache_init() do { } while (0) | 146 | extern void pgtable_cache_init(void); |
141 | 147 | ||
142 | struct vm_area_struct; | 148 | struct vm_area_struct; |
143 | 149 | ||
@@ -147,8 +153,9 @@ extern void __update_tlb(struct vm_area_struct *vma, | |||
147 | unsigned long address, pte_t pte); | 153 | unsigned long address, pte_t pte); |
148 | 154 | ||
149 | static inline void | 155 | static inline void |
150 | update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) | 156 | update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) |
151 | { | 157 | { |
158 | pte_t pte = *ptep; | ||
152 | __update_cache(vma, address, pte); | 159 | __update_cache(vma, address, pte); |
153 | __update_tlb(vma, address, pte); | 160 | __update_tlb(vma, address, pte); |
154 | } | 161 | } |