aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/include/asm/pci.h
diff options
context:
space:
mode:
authorAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
committerAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
commitada47b5fe13d89735805b566185f4885f5a3f750 (patch)
tree644b88f8a71896307d71438e9b3af49126ffb22b /arch/sh/include/asm/pci.h
parent43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff)
parent3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff)
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/sh/include/asm/pci.h')
-rw-r--r--arch/sh/include/asm/pci.h94
1 files changed, 42 insertions, 52 deletions
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 4163950cd1c6..8bd952fcf3ba 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -3,8 +3,6 @@
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#include <linux/dma-mapping.h>
7
8/* Can be used to override the logic in pci_scan_bus for skipping 6/* Can be used to override the logic in pci_scan_bus for skipping
9 already-configured bus numbers - to be used for buggy BIOSes 7 already-configured bus numbers - to be used for buggy BIOSes
10 or architectures with incomplete PCI setup by the loader */ 8 or architectures with incomplete PCI setup by the loader */
@@ -17,20 +15,49 @@
17 */ 15 */
18struct pci_channel { 16struct pci_channel {
19 struct pci_channel *next; 17 struct pci_channel *next;
18 struct pci_bus *bus;
20 19
21 struct pci_ops *pci_ops; 20 struct pci_ops *pci_ops;
22 struct resource *io_resource; 21
23 struct resource *mem_resource; 22 struct resource *resources;
23 unsigned int nr_resources;
24 24
25 unsigned long io_offset; 25 unsigned long io_offset;
26 unsigned long mem_offset; 26 unsigned long mem_offset;
27 27
28 unsigned long reg_base; 28 unsigned long reg_base;
29
30 unsigned long io_map_base; 29 unsigned long io_map_base;
30
31 unsigned int index;
32 unsigned int need_domain_info;
33
34 /* Optional error handling */
35 struct timer_list err_timer, serr_timer;
36 unsigned int err_irq, serr_irq;
31}; 37};
32 38
33extern void register_pci_controller(struct pci_channel *hose); 39/* arch/sh/drivers/pci/pci.c */
40extern int register_pci_controller(struct pci_channel *hose);
41extern void pcibios_report_status(unsigned int status_mask, int warn);
42
43/* arch/sh/drivers/pci/common.c */
44extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
45 int bus, int devfn, int offset, u8 *value);
46extern int early_read_config_word(struct pci_channel *hose, int top_bus,
47 int bus, int devfn, int offset, u16 *value);
48extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
49 int bus, int devfn, int offset, u32 *value);
50extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
51 int bus, int devfn, int offset, u8 value);
52extern int early_write_config_word(struct pci_channel *hose, int top_bus,
53 int bus, int devfn, int offset, u16 value);
54extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
55 int bus, int devfn, int offset, u32 value);
56extern void pcibios_enable_timers(struct pci_channel *hose);
57extern unsigned int pcibios_handle_status_errors(unsigned long addr,
58 unsigned int status, struct pci_channel *hose);
59extern int pci_is_66mhz_capable(struct pci_channel *hose,
60 int top_bus, int current_bus);
34 61
35extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM; 62extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
36 63
@@ -54,38 +81,7 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
54 * address space. The networking and block device layers use 81 * address space. The networking and block device layers use
55 * this boolean for bounce buffer decisions. 82 * this boolean for bounce buffer decisions.
56 */ 83 */
57#define PCI_DMA_BUS_IS_PHYS (1) 84#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
58
59#include <linux/types.h>
60#include <linux/slab.h>
61#include <asm/scatterlist.h>
62#include <linux/string.h>
63#include <asm/io.h>
64
65/* pci_unmap_{single,page} being a nop depends upon the
66 * configuration.
67 */
68#ifdef CONFIG_SH_PCIDMA_NONCOHERENT
69#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
70 dma_addr_t ADDR_NAME;
71#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
72 __u32 LEN_NAME;
73#define pci_unmap_addr(PTR, ADDR_NAME) \
74 ((PTR)->ADDR_NAME)
75#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
76 (((PTR)->ADDR_NAME) = (VAL))
77#define pci_unmap_len(PTR, LEN_NAME) \
78 ((PTR)->LEN_NAME)
79#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
80 (((PTR)->LEN_NAME) = (VAL))
81#else
82#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
83#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
84#define pci_unmap_addr(PTR, ADDR_NAME) (0)
85#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
86#define pci_unmap_len(PTR, LEN_NAME) (0)
87#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
88#endif
89 85
90#ifdef CONFIG_PCI 86#ifdef CONFIG_PCI
91/* 87/*
@@ -113,20 +109,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
113} 109}
114#endif 110#endif
115 111
116#ifdef CONFIG_SUPERH32
117/*
118 * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped
119 * at the end of the address space in a special non-translatable area.
120 */
121#define PCI_MEM_FIXED_START 0xfd000000
122#define PCI_MEM_FIXED_END (PCI_MEM_FIXED_START + 0x01000000)
123
124#define is_pci_memory_fixed_range(s, e) \
125 ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END)
126#else
127#define is_pci_memory_fixed_range(s, e) (0)
128#endif
129
130/* Board-specific fixup routines. */ 112/* Board-specific fixup routines. */
131int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); 113int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
132 114
@@ -136,6 +118,14 @@ extern void pcibios_resource_to_bus(struct pci_dev *dev,
136extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 118extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
137 struct pci_bus_region *region); 119 struct pci_bus_region *region);
138 120
121#define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index
122
123static inline int pci_proc_domain(struct pci_bus *bus)
124{
125 struct pci_channel *hose = bus->sysdata;
126 return hose->need_domain_info;
127}
128
139/* Chances are this interrupt is wired PC-style ... */ 129/* Chances are this interrupt is wired PC-style ... */
140static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 130static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
141{ 131{