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authorAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
committerAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
commitada47b5fe13d89735805b566185f4885f5a3f750 (patch)
tree644b88f8a71896307d71438e9b3af49126ffb22b /arch/sh/include/asm/io.h
parent43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff)
parent3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff)
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/sh/include/asm/io.h')
-rw-r--r--arch/sh/include/asm/io.h181
1 files changed, 137 insertions, 44 deletions
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 5be45ea4dfec..f689554e17c1 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -22,6 +22,7 @@
22 * for old compat code for I/O offseting to SuperIOs, all of which are 22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days. 23 * better handled through the machvec ioport mapping routines these days.
24 */ 24 */
25#include <linux/errno.h>
25#include <asm/cache.h> 26#include <asm/cache.h>
26#include <asm/system.h> 27#include <asm/system.h>
27#include <asm/addrspace.h> 28#include <asm/addrspace.h>
@@ -79,28 +80,81 @@
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) 80#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); }) 81#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
81 82
82/* SuperH on-chip I/O functions */ 83/*
83#define ctrl_inb __raw_readb 84 * Legacy SuperH on-chip I/O functions
84#define ctrl_inw __raw_readw 85 *
85#define ctrl_inl __raw_readl 86 * These are all deprecated, all new (and especially cross-platform) code
86#define ctrl_inq __raw_readq 87 * should be using the __raw_xxx() routines directly.
88 */
89static inline u8 __deprecated ctrl_inb(unsigned long addr)
90{
91 return __raw_readb(addr);
92}
93
94static inline u16 __deprecated ctrl_inw(unsigned long addr)
95{
96 return __raw_readw(addr);
97}
98
99static inline u32 __deprecated ctrl_inl(unsigned long addr)
100{
101 return __raw_readl(addr);
102}
103
104static inline u64 __deprecated ctrl_inq(unsigned long addr)
105{
106 return __raw_readq(addr);
107}
108
109static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
110{
111 __raw_writeb(v, addr);
112}
87 113
88#define ctrl_outb __raw_writeb 114static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
89#define ctrl_outw __raw_writew 115{
90#define ctrl_outl __raw_writel 116 __raw_writew(v, addr);
91#define ctrl_outq __raw_writeq 117}
118
119static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
120{
121 __raw_writel(v, addr);
122}
123
124static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
125{
126 __raw_writeq(v, addr);
127}
128
129extern unsigned long generic_io_base;
92 130
93static inline void ctrl_delay(void) 131static inline void ctrl_delay(void)
94{ 132{
95#ifdef CONFIG_CPU_SH4 133 __raw_readw(generic_io_base);
96 __raw_readw(CCN_PVR);
97#elif defined(P2SEG)
98 __raw_readw(P2SEG);
99#else
100#error "Need a dummy address for delay"
101#endif
102} 134}
103 135
136#define __BUILD_UNCACHED_IO(bwlq, type) \
137static inline type read##bwlq##_uncached(unsigned long addr) \
138{ \
139 type ret; \
140 jump_to_uncached(); \
141 ret = __raw_read##bwlq(addr); \
142 back_to_cached(); \
143 return ret; \
144} \
145 \
146static inline void write##bwlq##_uncached(type v, unsigned long addr) \
147{ \
148 jump_to_uncached(); \
149 __raw_write##bwlq(v, addr); \
150 back_to_cached(); \
151}
152
153__BUILD_UNCACHED_IO(b, u8)
154__BUILD_UNCACHED_IO(w, u16)
155__BUILD_UNCACHED_IO(l, u32)
156__BUILD_UNCACHED_IO(q, u64)
157
104#define __BUILD_MEMORY_STRING(bwlq, type) \ 158#define __BUILD_MEMORY_STRING(bwlq, type) \
105 \ 159 \
106static inline void __raw_writes##bwlq(volatile void __iomem *mem, \ 160static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
@@ -186,8 +240,6 @@ __BUILD_MEMORY_STRING(q, u64)
186 240
187#define IO_SPACE_LIMIT 0xffffffff 241#define IO_SPACE_LIMIT 0xffffffff
188 242
189extern unsigned long generic_io_base;
190
191/* 243/*
192 * This function provides a method for the generic case where a 244 * This function provides a method for the generic case where a
193 * board-specific ioport_map simply needs to return the port + some 245 * board-specific ioport_map simply needs to return the port + some
@@ -239,23 +291,22 @@ unsigned long long poke_real_address_q(unsigned long long addr,
239 * doesn't exist, so everything must go through page tables. 291 * doesn't exist, so everything must go through page tables.
240 */ 292 */
241#ifdef CONFIG_MMU 293#ifdef CONFIG_MMU
242void __iomem *__ioremap(unsigned long offset, unsigned long size, 294void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size,
243 unsigned long flags); 295 pgprot_t prot, void *caller);
244void __iounmap(void __iomem *addr); 296void __iounmap(void __iomem *addr);
245 297
246static inline void __iomem * 298static inline void __iomem *
247__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) 299__ioremap(phys_addr_t offset, unsigned long size, pgprot_t prot)
248{ 300{
249#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED) 301 return __ioremap_caller(offset, size, prot, __builtin_return_address(0));
250 unsigned long last_addr = offset + size - 1; 302}
251#endif
252 void __iomem *ret;
253 303
254 ret = __ioremap_trapped(offset, size); 304static inline void __iomem *
255 if (ret) 305__ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
256 return ret; 306{
307#ifdef CONFIG_29BIT
308 phys_addr_t last_addr = offset + size - 1;
257 309
258#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED)
259 /* 310 /*
260 * For P1 and P2 space this is trivial, as everything is already 311 * For P1 and P2 space this is trivial, as everything is already
261 * mapped. Uncached access for P1 addresses are done through P2. 312 * mapped. Uncached access for P1 addresses are done through P2.
@@ -263,7 +314,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
263 * mapping must be done by the PMB or by using page tables. 314 * mapping must be done by the PMB or by using page tables.
264 */ 315 */
265 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { 316 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
266 if (unlikely(flags & _PAGE_CACHABLE)) 317 if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE))
267 return (void __iomem *)P1SEGADDR(offset); 318 return (void __iomem *)P1SEGADDR(offset);
268 319
269 return (void __iomem *)P2SEGADDR(offset); 320 return (void __iomem *)P2SEGADDR(offset);
@@ -274,25 +325,67 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
274 return (void __iomem *)P4SEGADDR(offset); 325 return (void __iomem *)P4SEGADDR(offset);
275#endif 326#endif
276 327
277 return __ioremap(offset, size, flags); 328 return NULL;
329}
330
331static inline void __iomem *
332__ioremap_mode(phys_addr_t offset, unsigned long size, pgprot_t prot)
333{
334 void __iomem *ret;
335
336 ret = __ioremap_trapped(offset, size);
337 if (ret)
338 return ret;
339
340 ret = __ioremap_29bit(offset, size, prot);
341 if (ret)
342 return ret;
343
344 return __ioremap(offset, size, prot);
278} 345}
279#else 346#else
280#define __ioremap_mode(offset, size, flags) ((void __iomem *)(offset)) 347#define __ioremap(offset, size, prot) ((void __iomem *)(offset))
348#define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset))
281#define __iounmap(addr) do { } while (0) 349#define __iounmap(addr) do { } while (0)
282#endif /* CONFIG_MMU */ 350#endif /* CONFIG_MMU */
283 351
284#define ioremap(offset, size) \ 352static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size)
285 __ioremap_mode((offset), (size), 0) 353{
286#define ioremap_nocache(offset, size) \ 354 return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE);
287 __ioremap_mode((offset), (size), 0) 355}
288#define ioremap_cache(offset, size) \ 356
289 __ioremap_mode((offset), (size), _PAGE_CACHABLE) 357static inline void __iomem *
290#define p3_ioremap(offset, size, flags) \ 358ioremap_cache(phys_addr_t offset, unsigned long size)
291 __ioremap((offset), (size), (flags)) 359{
292#define ioremap_prot(offset, size, flags) \ 360 return __ioremap_mode(offset, size, PAGE_KERNEL);
293 __ioremap_mode((offset), (size), (flags)) 361}
294#define iounmap(addr) \ 362
295 __iounmap((addr)) 363#ifdef CONFIG_HAVE_IOREMAP_PROT
364static inline void __iomem *
365ioremap_prot(phys_addr_t offset, unsigned long size, unsigned long flags)
366{
367 return __ioremap_mode(offset, size, __pgprot(flags));
368}
369#endif
370
371#ifdef CONFIG_IOREMAP_FIXED
372extern void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t);
373extern int iounmap_fixed(void __iomem *);
374extern void ioremap_fixed_init(void);
375#else
376static inline void __iomem *
377ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot)
378{
379 BUG();
380 return NULL;
381}
382
383static inline void ioremap_fixed_init(void) { }
384static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; }
385#endif
386
387#define ioremap_nocache ioremap
388#define iounmap __iounmap
296 389
297#define maybebadio(port) \ 390#define maybebadio(port) \
298 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ 391 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \