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authorPaul Walmsley <paul@pwsan.com>2009-01-27 21:12:47 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 12:50:24 -0500
commit16c90f020034d3cd38b3dab280001e728e6b19e5 (patch)
tree71b142bdf83578688b4844b0b65414f2b3d6c3df /arch/sh/drivers
parent6f7607ccd175518a3ee7dccc1620f3a086689668 (diff)
[ARM] OMAP2/3: Add non-CORE DPLL rate set code and M, N programming
Add non-CORE DPLL rate set code and M,N programming for OMAP3. Connect it to OMAP34xx DPLLs 1, 2, 4, 5 via the clock framework. You may see some warnings on rate sets from the freqsel code. The table that TI presented in the 3430 TRM Rev F does not cover Fint < 750000, which definitely occurs in practice. However, the lack of this freqsel case does not appear to impair the DPLL rate change. linux-omap source commit is 689fe67c6d1ad8f52f7f7b139a3274b79bf3e784. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/sh/drivers')
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