aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/drivers/pci
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2009-03-11 03:12:39 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-16 03:00:15 -0400
commit3aabce8d3d2f9af2c08c2f590ac9acb272ca8c95 (patch)
tree951cb912d729b04c102f3bea28a56bfb64db66d3 /arch/sh/drivers/pci
parent10591578c84825a320734e59272f161385edcc41 (diff)
sh: sh7785lcr: Update for recent PCI changes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci')
-rw-r--r--arch/sh/drivers/pci/fixups-sh7785lcr.c33
-rw-r--r--arch/sh/drivers/pci/ops-sh7785lcr.c4
2 files changed, 19 insertions, 18 deletions
diff --git a/arch/sh/drivers/pci/fixups-sh7785lcr.c b/arch/sh/drivers/pci/fixups-sh7785lcr.c
index 4949e601387a..9e7dc79037e7 100644
--- a/arch/sh/drivers/pci/fixups-sh7785lcr.c
+++ b/arch/sh/drivers/pci/fixups-sh7785lcr.c
@@ -15,32 +15,33 @@
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include "pci-sh4.h" 16#include "pci-sh4.h"
17 17
18int pci_fixup_pcic(void) 18int pci_fixup_pcic(struct pci_channel *chan)
19{ 19{
20 pci_write_reg(0x000043ff, SH4_PCIINTM); 20 pci_write_reg(chan, 0x000043ff, SH4_PCIINTM);
21 pci_write_reg(0x0000380f, SH4_PCIAINTM); 21 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
22 22
23 pci_write_reg(0xfbb00047, SH7780_PCICMD); 23 pci_write_reg(chan, 0xfbb00047, SH7780_PCICMD);
24 pci_write_reg(0x00000000, SH7780_PCIIBAR); 24 pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR);
25 25
26 pci_write_reg(0x00011912, SH7780_PCISVID); 26 pci_write_reg(chan, 0x00011912, SH7780_PCISVID);
27 pci_write_reg(0x08000000, SH7780_PCICSCR0); 27 pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0);
28 pci_write_reg(0x0000001b, SH7780_PCICSAR0); 28 pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0);
29 pci_write_reg(0xfd000000, SH7780_PCICSCR1); 29 pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1);
30 pci_write_reg(0x0000000f, SH7780_PCICSAR1); 30 pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1);
31 31
32 pci_write_reg(0xfd000000, SH7780_PCIMBR0); 32 pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0);
33 pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); 33 pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0);
34 34
35#ifdef CONFIG_32BIT 35#ifdef CONFIG_32BIT
36 pci_write_reg(0xc0000000, SH7780_PCIMBR2); 36 pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2);
37 pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); 37 pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
38#endif 38#endif
39 39
40 /* Set IOBR for windows containing area specified in pci.h */ 40 /* Set IOBR for windows containing area specified in pci.h */
41 pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), 41 pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE - 1),
42 SH7780_PCIIOBR); 42 SH7780_PCIIOBR);
43 pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); 43 pci_write_reg(chan, ((SH7780_PCI_IO_SIZE - 1) & (7 << 18)),
44 SH7780_PCIIOBMR);
44 45
45 return 0; 46 return 0;
46} 47}
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c
index 2a9f9a599d66..afbb9bd47513 100644
--- a/arch/sh/drivers/pci/ops-sh7785lcr.c
+++ b/arch/sh/drivers/pci/ops-sh7785lcr.c
@@ -41,7 +41,7 @@ static struct resource sh7785_mem_resource = {
41}; 41};
42 42
43struct pci_channel board_pci_channels[] = { 43struct pci_channel board_pci_channels[] = {
44 { &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, 44 { sh7780_pci_init, &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff },
45 { NULL, NULL, NULL, 0, 0 }, 45 { NULL, NULL, NULL, 0, 0 },
46}; 46};
47 47
@@ -61,5 +61,5 @@ static struct sh4_pci_address_map sh7785_pci_map = {
61 61
62int __init pcibios_init_platform(void) 62int __init pcibios_init_platform(void)
63{ 63{
64 return sh7780_pcic_init(&sh7785_pci_map); 64 return sh7780_pcic_init(&board_pci_channels[0], &sh7785_pci_map);
65} 65}