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authorPaul Mundt <lethal@linux-sh.org>2010-09-19 00:57:51 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-09-19 00:57:51 -0400
commit81df84f4060f4f19c7e6f39c7c527a6098436a2a (patch)
tree617779f42664440d4787bbdd028a205f17bc825a /arch/sh/drivers/pci/pcie-sh7786.c
parentbdf7499081fc3c521d0f8fc28c6950c7c9bd7e97 (diff)
sh: pci: Give SH7786 PHY some time to settle.
The spec suggests waiting up to 500ms for the PHY to settle before testing link state, but practice shows that 100ms is sufficient (this is the delay value we also use on the other SH-4A PCI controllers, too). This makes device detection much more reliable, although in the future it should be a bit faster to simply serialize with a TLP IRQ. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/pcie-sh7786.c')
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index 5ae58ec025c8..4e6cf8804979 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -312,6 +312,9 @@ static int pcie_init(struct sh7786_pcie_port *port)
312 data |= 0x1; 312 data |= 0x1;
313 pci_write_reg(chan, data, SH4A_PCIETCTLR); 313 pci_write_reg(chan, data, SH4A_PCIETCTLR);
314 314
315 /* Let things settle down a bit.. */
316 mdelay(100);
317
315 /* Enable DL_Active Interrupt generation */ 318 /* Enable DL_Active Interrupt generation */
316 data = pci_read_reg(chan, SH4A_PCIEDLINTENR); 319 data = pci_read_reg(chan, SH4A_PCIEDLINTENR);
317 data |= PCIEDLINTENR_DLL_ACT_ENABLE; 320 data |= PCIEDLINTENR_DLL_ACT_ENABLE;