Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into common/serial-rework

Conflicts:
	arch/sh/kernel/cpu/sh2/setup-sh7619.c
	arch/sh/kernel/cpu/sh2a/setup-mxg.c
	arch/sh/kernel/cpu/sh2a/setup-sh7201.c
	arch/sh/kernel/cpu/sh2a/setup-sh7203.c
	arch/sh/kernel/cpu/sh2a/setup-sh7206.c
	arch/sh/kernel/cpu/sh3/setup-sh7705.c
	arch/sh/kernel/cpu/sh3/setup-sh770x.c
	arch/sh/kernel/cpu/sh3/setup-sh7710.c
	arch/sh/kernel/cpu/sh3/setup-sh7720.c
	arch/sh/kernel/cpu/sh4/setup-sh4-202.c
	arch/sh/kernel/cpu/sh4/setup-sh7750.c
	arch/sh/kernel/cpu/sh4/setup-sh7760.c
	arch/sh/kernel/cpu/sh4a/setup-sh7343.c
	arch/sh/kernel/cpu/sh4a/setup-sh7366.c
	arch/sh/kernel/cpu/sh4a/setup-sh7722.c
	arch/sh/kernel/cpu/sh4a/setup-sh7723.c
	arch/sh/kernel/cpu/sh4a/setup-sh7724.c
	arch/sh/kernel/cpu/sh4a/setup-sh7763.c
	arch/sh/kernel/cpu/sh4a/setup-sh7770.c
	arch/sh/kernel/cpu/sh4a/setup-sh7780.c
	arch/sh/kernel/cpu/sh4a/setup-sh7785.c
	arch/sh/kernel/cpu/sh4a/setup-sh7786.c
	arch/sh/kernel/cpu/sh4a/setup-shx3.c
	arch/sh/kernel/cpu/sh5/setup-sh5.c
	drivers/serial/sh-sci.c
	drivers/serial/sh-sci.h
	include/linux/serial_sci.h

1 files changed, 17 insertions, 14 deletions

diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 37fb5b8bbc3f..827208781ed5 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -52,11 +52,14 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
  *
  * iterations to complete the transfer.
  */
+static unsigned int ts_shift[] = TS_SHIFT;
 static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
 {
-        u32 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        u32 chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
+        int cnt = ((chcr & CHCR_TS_LOW_MASK) >> CHCR_TS_LOW_SHIFT) |
+                ((chcr & CHCR_TS_HIGH_MASK) >> CHCR_TS_HIGH_SHIFT);
 
-        return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT];
+        return ts_shift[cnt];
 }
 
 /*
@@ -70,13 +73,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
         struct dma_channel *chan = dev_id;
         u32 chcr;
 
-        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
 
         if (!(chcr & CHCR_TE))
                 return IRQ_NONE;
 
         chcr &= ~(CHCR_IE | CHCR_DE);
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         wake_up(&chan->wait_queue);
 
@@ -115,7 +118,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
                 chan->flags &= ~DMA_TEI_CAPABLE;
         }
 
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         chan->flags |= DMA_CONFIGURED;
         return 0;
@@ -126,13 +129,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)
         int irq;
         u32 chcr;
 
-        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
         chcr |= CHCR_DE;
 
         if (chan->flags & DMA_TEI_CAPABLE)
                 chcr |= CHCR_IE;
 
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         if (chan->flags & DMA_TEI_CAPABLE) {
                 irq = get_dmte_irq(chan->chan);
@@ -150,9 +153,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)
                 disable_irq(irq);
         }
 
-        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
+        chcr = __raw_readl(dma_base_addr[chan->chan] + CHCR);
         chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
-        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
+        __raw_writel(chcr, (dma_base_addr[chan->chan] + CHCR));
 }
 
 static int sh_dmac_xfer_dma(struct dma_channel *chan)
@@ -183,12 +186,12 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
          */
         if (chan->sar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->sar, (dma_base_addr[chan->chan]+SAR));
+                __raw_writel(chan->sar, (dma_base_addr[chan->chan]+SAR));
         if (chan->dar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->dar, (dma_base_addr[chan->chan] + DAR));
+                __raw_writel(chan->dar, (dma_base_addr[chan->chan] + DAR));
 
-        ctrl_outl(chan->count >> calc_xmit_shift(chan),
+        __raw_writel(chan->count >> calc_xmit_shift(chan),
                 (dma_base_addr[chan->chan] + TCR));
 
         sh_dmac_enable_dma(chan);
@@ -198,10 +201,10 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
 
 static int sh_dmac_get_dma_residue(struct dma_channel *chan)
 {
-        if (!(ctrl_inl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
+        if (!(__raw_readl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
                 return 0;
 
-        return ctrl_inl(dma_base_addr[chan->chan] + TCR)
+        return __raw_readl(dma_base_addr[chan->chan] + TCR)
                  << calc_xmit_shift(chan);
 }