diff options
author | Magnus Damm <damm@igel.co.jp> | 2008-07-17 06:16:11 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-28 05:10:37 -0400 |
commit | 6c7d826cf6ff05264f9af04410aee82a08edfb9f (patch) | |
tree | ce110c55b7429071732321f9fcad19b97461f887 /arch/sh/boards/se/7722/setup.c | |
parent | 9ca6ecac505002d0c34b47b394f39aa14b0e6fb6 (diff) |
sh: Use clk_always_enable() on sh7722 / Migo-R / SE7722
Use clk_always_enable() on the sh7722 processor and in the board code
for Migo-R and Solution Engine 7722. Remove duplicate MSTPCR register
definitions.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/se/7722/setup.c')
-rw-r--r-- | arch/sh/boards/se/7722/setup.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c index ede3957fc14a..6e228ea59788 100644 --- a/arch/sh/boards/se/7722/setup.c +++ b/arch/sh/boards/se/7722/setup.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/input.h> | 16 | #include <linux/input.h> |
17 | #include <linux/smc91x.h> | 17 | #include <linux/smc91x.h> |
18 | #include <asm/machvec.h> | 18 | #include <asm/machvec.h> |
19 | #include <asm/clock.h> | ||
19 | #include <asm/se7722.h> | 20 | #include <asm/se7722.h> |
20 | #include <asm/io.h> | 21 | #include <asm/io.h> |
21 | #include <asm/heartbeat.h> | 22 | #include <asm/heartbeat.h> |
@@ -145,6 +146,8 @@ static struct platform_device *se7722_devices[] __initdata = { | |||
145 | 146 | ||
146 | static int __init se7722_devices_setup(void) | 147 | static int __init se7722_devices_setup(void) |
147 | { | 148 | { |
149 | clk_always_enable("mstp214"); /* KEYSC */ | ||
150 | |||
148 | return platform_add_devices(se7722_devices, | 151 | return platform_add_devices(se7722_devices, |
149 | ARRAY_SIZE(se7722_devices)); | 152 | ARRAY_SIZE(se7722_devices)); |
150 | } | 153 | } |
@@ -154,11 +157,6 @@ static void __init se7722_setup(char **cmdline_p) | |||
154 | { | 157 | { |
155 | ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ | 158 | ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ |
156 | 159 | ||
157 | ctrl_outl(0x00051001, MSTPCR0); | ||
158 | ctrl_outl(0x00000000, MSTPCR1); | ||
159 | /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC, USB */ | ||
160 | ctrl_outl(0xffffb7c0, MSTPCR2); | ||
161 | |||
162 | ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ | 160 | ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ |
163 | ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ | 161 | ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ |
164 | 162 | ||