diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-01-25 22:58:40 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-01-25 22:58:40 -0500 |
commit | 9d56dd3b083a3bec56e9da35ce07baca81030b03 (patch) | |
tree | a9df9d514fbc32defc1ca8a6d7c2795f15b8a128 /arch/sh/boards/mach-sh7763rdp | |
parent | a077e91690fb32a1453423b2cf1df3492fd30c3a (diff) |
sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/mach-sh7763rdp')
-rw-r--r-- | arch/sh/boards/mach-sh7763rdp/irq.c | 10 | ||||
-rw-r--r-- | arch/sh/boards/mach-sh7763rdp/setup.c | 40 |
2 files changed, 25 insertions, 25 deletions
diff --git a/arch/sh/boards/mach-sh7763rdp/irq.c b/arch/sh/boards/mach-sh7763rdp/irq.c index d8ebfa7d8c76..add698c8f2b4 100644 --- a/arch/sh/boards/mach-sh7763rdp/irq.c +++ b/arch/sh/boards/mach-sh7763rdp/irq.c | |||
@@ -28,18 +28,18 @@ | |||
28 | void __init init_sh7763rdp_IRQ(void) | 28 | void __init init_sh7763rdp_IRQ(void) |
29 | { | 29 | { |
30 | /* GPIO enabled */ | 30 | /* GPIO enabled */ |
31 | ctrl_outl(1 << 25, INTC_INT2MSKCR); | 31 | __raw_writel(1 << 25, INTC_INT2MSKCR); |
32 | 32 | ||
33 | /* enable GPIO interrupts */ | 33 | /* enable GPIO interrupts */ |
34 | ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, | 34 | __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, |
35 | INTC_INT2PRI7); | 35 | INTC_INT2PRI7); |
36 | 36 | ||
37 | /* USBH enabled */ | 37 | /* USBH enabled */ |
38 | ctrl_outl(1 << 17, INTC_INT2MSKCR1); | 38 | __raw_writel(1 << 17, INTC_INT2MSKCR1); |
39 | 39 | ||
40 | /* GETHER enabled */ | 40 | /* GETHER enabled */ |
41 | ctrl_outl(1 << 16, INTC_INT2MSKCR1); | 41 | __raw_writel(1 << 16, INTC_INT2MSKCR1); |
42 | 42 | ||
43 | /* DMAC enabled */ | 43 | /* DMAC enabled */ |
44 | ctrl_outl(1 << 8, INTC_INT2MSKCR); | 44 | __raw_writel(1 << 8, INTC_INT2MSKCR); |
45 | } | 45 | } |
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c index 390534a0b35c..f64a6918224c 100644 --- a/arch/sh/boards/mach-sh7763rdp/setup.c +++ b/arch/sh/boards/mach-sh7763rdp/setup.c | |||
@@ -158,50 +158,50 @@ device_initcall(sh7763rdp_devices_setup); | |||
158 | static void __init sh7763rdp_setup(char **cmdline_p) | 158 | static void __init sh7763rdp_setup(char **cmdline_p) |
159 | { | 159 | { |
160 | /* Board version check */ | 160 | /* Board version check */ |
161 | if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) | 161 | if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) |
162 | printk(KERN_INFO "RTE Standard Configuration\n"); | 162 | printk(KERN_INFO "RTE Standard Configuration\n"); |
163 | else | 163 | else |
164 | printk(KERN_INFO "RTA Standard Configuration\n"); | 164 | printk(KERN_INFO "RTA Standard Configuration\n"); |
165 | 165 | ||
166 | /* USB pin select bits (clear bit 5-2 to 0) */ | 166 | /* USB pin select bits (clear bit 5-2 to 0) */ |
167 | ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); | 167 | __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); |
168 | /* USBH setup port I controls to other (clear bits 4-9 to 0) */ | 168 | /* USBH setup port I controls to other (clear bits 4-9 to 0) */ |
169 | ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR); | 169 | __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR); |
170 | 170 | ||
171 | /* Select USB Host controller */ | 171 | /* Select USB Host controller */ |
172 | ctrl_outw(0x00, USB_USBHSC); | 172 | __raw_writew(0x00, USB_USBHSC); |
173 | 173 | ||
174 | /* For LCD */ | 174 | /* For LCD */ |
175 | /* set PTJ7-1, bits 15-2 of PJCR to 0 */ | 175 | /* set PTJ7-1, bits 15-2 of PJCR to 0 */ |
176 | ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR); | 176 | __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR); |
177 | /* set PTI5, bits 11-10 of PICR to 0 */ | 177 | /* set PTI5, bits 11-10 of PICR to 0 */ |
178 | ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR); | 178 | __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR); |
179 | ctrl_outw(0, PORT_PKCR); | 179 | __raw_writew(0, PORT_PKCR); |
180 | ctrl_outw(0, PORT_PLCR); | 180 | __raw_writew(0, PORT_PLCR); |
181 | /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ | 181 | /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ |
182 | ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); | 182 | __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); |
183 | /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ | 183 | /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ |
184 | ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3); | 184 | __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3); |
185 | 185 | ||
186 | /* For HAC */ | 186 | /* For HAC */ |
187 | /* bit3-0 0100:HAC & SSI1 enable */ | 187 | /* bit3-0 0100:HAC & SSI1 enable */ |
188 | ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); | 188 | __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); |
189 | /* bit14 1:SSI_HAC_CLK enable */ | 189 | /* bit14 1:SSI_HAC_CLK enable */ |
190 | ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4); | 190 | __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4); |
191 | 191 | ||
192 | /* SH-Ether */ | 192 | /* SH-Ether */ |
193 | ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); | 193 | __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); |
194 | ctrl_outw(0x0, PORT_PFCR); | 194 | __raw_writew(0x0, PORT_PFCR); |
195 | ctrl_outw(0x0, PORT_PFCR); | 195 | __raw_writew(0x0, PORT_PFCR); |
196 | ctrl_outw(0x0, PORT_PFCR); | 196 | __raw_writew(0x0, PORT_PFCR); |
197 | 197 | ||
198 | /* MMC */ | 198 | /* MMC */ |
199 | /*selects SCIF and MMC other functions */ | 199 | /*selects SCIF and MMC other functions */ |
200 | ctrl_outw(0x0001, PORT_PSEL0); | 200 | __raw_writew(0x0001, PORT_PSEL0); |
201 | /* MMC clock operates */ | 201 | /* MMC clock operates */ |
202 | ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1); | 202 | __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1); |
203 | ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR); | 203 | __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR); |
204 | ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); | 204 | __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); |
205 | } | 205 | } |
206 | 206 | ||
207 | static struct sh_machine_vector mv_sh7763rdp __initmv = { | 207 | static struct sh_machine_vector mv_sh7763rdp __initmv = { |