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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 03:43:28 -0400
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 03:43:28 -0400
commit959f85f8a3223c116bbe95dd8a9b207790b5d4d3 (patch)
treee7da9ccf292f860bfa0ff9cc8b2682cd1d6bad4d /arch/sh/boards/landisk
parente108b2ca2349f510ce7d7f910eda89f71d710d84 (diff)
sh: Consolidated SH7751/SH7780 PCI support.
This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/landisk')
-rw-r--r--arch/sh/boards/landisk/Makefile2
-rw-r--r--arch/sh/boards/landisk/io.c100
2 files changed, 33 insertions, 69 deletions
diff --git a/arch/sh/boards/landisk/Makefile b/arch/sh/boards/landisk/Makefile
index 60e75c6db0eb..89e4beb2ad47 100644
--- a/arch/sh/boards/landisk/Makefile
+++ b/arch/sh/boards/landisk/Makefile
@@ -3,5 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o 5obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o
6
7obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/sh/boards/landisk/io.c b/arch/sh/boards/landisk/io.c
index aa6b145c9e8f..92498b4947d5 100644
--- a/arch/sh/boards/landisk/io.c
+++ b/arch/sh/boards/landisk/io.c
@@ -14,39 +14,16 @@
14 * modifed by kogiidena 14 * modifed by kogiidena
15 * 2005.03.03 15 * 2005.03.03
16 */ 16 */
17
18#include <linux/kernel.h> 17#include <linux/kernel.h>
19#include <linux/types.h> 18#include <linux/types.h>
19#include <linux/pci.h>
20#include <asm/landisk/iodata_landisk.h> 20#include <asm/landisk/iodata_landisk.h>
21#include <asm/addrspace.h> 21#include <asm/addrspace.h>
22#include <asm/io.h> 22#include <asm/io.h>
23 23
24#include <linux/module.h>
25#include <linux/pci.h>
26#include "../../drivers/pci/pci-sh7751.h"
27
28extern void *area5_io_base; /* Area 5 I/O Base address */ 24extern void *area5_io_base; /* Area 5 I/O Base address */
29extern void *area6_io_base; /* Area 6 I/O Base address */ 25extern void *area6_io_base; /* Area 6 I/O Base address */
30 26
31/*
32 * The 7751R LANDISK uses the built-in PCI controller (PCIC)
33 * of the 7751R processor, and has a SuperIO accessible via the PCI.
34 * The board also includes a PCMCIA controller on its memory bus,
35 * like the other Solution Engine boards.
36 */
37
38#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
39#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
40#define PCI_IO_AREA SH7751_PCI_IO_BASE
41#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
42
43#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
44
45static inline void delay(void)
46{
47 ctrl_inw(0xa0000000);
48}
49
50static inline unsigned long port2adr(unsigned int port) 27static inline unsigned long port2adr(unsigned int port)
51{ 28{
52 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 29 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
@@ -67,17 +44,6 @@ static inline unsigned long port2adr(unsigned int port)
67 return port; 44 return port;
68} 45}
69 46
70/* In case someone configures the kernel w/o PCI support: in that */
71/* scenario, don't ever bother to check for PCI-window addresses */
72
73/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
74#if defined(CONFIG_PCI)
75#define CHECK_SH7751_PCIIO(port) \
76 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
77#else
78#define CHECK_SH_7751_PCIIO(port) (0)
79#endif
80
81/* 47/*
82 * General outline: remap really low stuff [eventually] to SuperIO, 48 * General outline: remap really low stuff [eventually] to SuperIO,
83 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 49 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -89,8 +55,8 @@ u8 landisk_inb(unsigned long port)
89{ 55{
90 if (PXSEG(port)) 56 if (PXSEG(port))
91 return ctrl_inb(port); 57 return ctrl_inb(port);
92 else if (CHECK_SH7751_PCIIO(port)) 58 else if (is_pci_ioaddr(port))
93 return ctrl_inb(PCI_IOMAP(port)); 59 return ctrl_inb(pci_ioaddr(port));
94 60
95 return ctrl_inw(port2adr(port)) & 0xff; 61 return ctrl_inw(port2adr(port)) & 0xff;
96} 62}
@@ -101,12 +67,12 @@ u8 landisk_inb_p(unsigned long port)
101 67
102 if (PXSEG(port)) 68 if (PXSEG(port))
103 v = ctrl_inb(port); 69 v = ctrl_inb(port);
104 else if (CHECK_SH7751_PCIIO(port)) 70 else if (is_pci_ioaddr(port))
105 v = ctrl_inb(PCI_IOMAP(port)); 71 v = ctrl_inb(pci_ioaddr(port));
106 else 72 else
107 v = ctrl_inw(port2adr(port)) & 0xff; 73 v = ctrl_inw(port2adr(port)) & 0xff;
108 74
109 delay(); 75 ctrl_delay();
110 76
111 return v; 77 return v;
112} 78}
@@ -115,8 +81,8 @@ u16 landisk_inw(unsigned long port)
115{ 81{
116 if (PXSEG(port)) 82 if (PXSEG(port))
117 return ctrl_inw(port); 83 return ctrl_inw(port);
118 else if (CHECK_SH7751_PCIIO(port)) 84 else if (is_pci_ioaddr(port))
119 return ctrl_inw(PCI_IOMAP(port)); 85 return ctrl_inw(pci_ioaddr(port));
120 else 86 else
121 maybebadio(port); 87 maybebadio(port);
122 88
@@ -127,8 +93,8 @@ u32 landisk_inl(unsigned long port)
127{ 93{
128 if (PXSEG(port)) 94 if (PXSEG(port))
129 return ctrl_inl(port); 95 return ctrl_inl(port);
130 else if (CHECK_SH7751_PCIIO(port)) 96 else if (is_pci_ioaddr(port))
131 return ctrl_inl(PCI_IOMAP(port)); 97 return ctrl_inl(pci_ioaddr(port));
132 else 98 else
133 maybebadio(port); 99 maybebadio(port);
134 100
@@ -139,8 +105,8 @@ void landisk_outb(u8 value, unsigned long port)
139{ 105{
140 if (PXSEG(port)) 106 if (PXSEG(port))
141 ctrl_outb(value, port); 107 ctrl_outb(value, port);
142 else if (CHECK_SH7751_PCIIO(port)) 108 else if (is_pci_ioaddr(port))
143 ctrl_outb(value, PCI_IOMAP(port)); 109 ctrl_outb(value, pci_ioaddr(port));
144 else 110 else
145 ctrl_outw(value, port2adr(port)); 111 ctrl_outw(value, port2adr(port));
146} 112}
@@ -149,19 +115,19 @@ void landisk_outb_p(u8 value, unsigned long port)
149{ 115{
150 if (PXSEG(port)) 116 if (PXSEG(port))
151 ctrl_outb(value, port); 117 ctrl_outb(value, port);
152 else if (CHECK_SH7751_PCIIO(port)) 118 else if (is_pci_ioaddr(port))
153 ctrl_outb(value, PCI_IOMAP(port)); 119 ctrl_outb(value, pci_ioaddr(port));
154 else 120 else
155 ctrl_outw(value, port2adr(port)); 121 ctrl_outw(value, port2adr(port));
156 delay(); 122 ctrl_delay();
157} 123}
158 124
159void landisk_outw(u16 value, unsigned long port) 125void landisk_outw(u16 value, unsigned long port)
160{ 126{
161 if (PXSEG(port)) 127 if (PXSEG(port))
162 ctrl_outw(value, port); 128 ctrl_outw(value, port);
163 else if (CHECK_SH7751_PCIIO(port)) 129 else if (is_pci_ioaddr(port))
164 ctrl_outw(value, PCI_IOMAP(port)); 130 ctrl_outw(value, pci_ioaddr(port));
165 else 131 else
166 maybebadio(port); 132 maybebadio(port);
167} 133}
@@ -170,8 +136,8 @@ void landisk_outl(u32 value, unsigned long port)
170{ 136{
171 if (PXSEG(port)) 137 if (PXSEG(port))
172 ctrl_outl(value, port); 138 ctrl_outl(value, port);
173 else if (CHECK_SH7751_PCIIO(port)) 139 else if (is_pci_ioaddr(port))
174 ctrl_outl(value, PCI_IOMAP(port)); 140 ctrl_outl(value, pci_ioaddr(port));
175 else 141 else
176 maybebadio(port); 142 maybebadio(port);
177} 143}
@@ -184,8 +150,8 @@ void landisk_insb(unsigned long port, void *dst, unsigned long count)
184 if (PXSEG(port)) { 150 if (PXSEG(port)) {
185 while (count--) 151 while (count--)
186 *buf++ = *(volatile u8 *)port; 152 *buf++ = *(volatile u8 *)port;
187 } else if (CHECK_SH7751_PCIIO(port)) { 153 } else if (is_pci_ioaddr(port)) {
188 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); 154 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
189 155
190 while (count--) 156 while (count--)
191 *buf++ = *bp; 157 *buf++ = *bp;
@@ -203,8 +169,8 @@ void landisk_insw(unsigned long port, void *dst, unsigned long count)
203 169
204 if (PXSEG(port)) 170 if (PXSEG(port))
205 p = (volatile u16 *)port; 171 p = (volatile u16 *)port;
206 else if (CHECK_SH7751_PCIIO(port)) 172 else if (is_pci_ioaddr(port))
207 p = (volatile u16 *)PCI_IOMAP(port); 173 p = (volatile u16 *)pci_ioaddr(port);
208 else 174 else
209 p = (volatile u16 *)port2adr(port); 175 p = (volatile u16 *)port2adr(port);
210 while (count--) 176 while (count--)
@@ -215,8 +181,8 @@ void landisk_insl(unsigned long port, void *dst, unsigned long count)
215{ 181{
216 u32 *buf = dst; 182 u32 *buf = dst;
217 183
218 if (CHECK_SH7751_PCIIO(port)) { 184 if (is_pci_ioaddr(port)) {
219 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 185 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
220 186
221 while (count--) 187 while (count--)
222 *buf++ = *p; 188 *buf++ = *p;
@@ -232,8 +198,8 @@ void landisk_outsb(unsigned long port, const void *src, unsigned long count)
232 if (PXSEG(port)) 198 if (PXSEG(port))
233 while (count--) 199 while (count--)
234 ctrl_outb(*buf++, port); 200 ctrl_outb(*buf++, port);
235 else if (CHECK_SH7751_PCIIO(port)) { 201 else if (is_pci_ioaddr(port)) {
236 volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port); 202 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
237 203
238 while (count--) 204 while (count--)
239 *bp = *buf++; 205 *bp = *buf++;
@@ -251,8 +217,8 @@ void landisk_outsw(unsigned long port, const void *src, unsigned long count)
251 217
252 if (PXSEG(port)) 218 if (PXSEG(port))
253 p = (volatile u16 *)port; 219 p = (volatile u16 *)port;
254 else if (CHECK_SH7751_PCIIO(port)) 220 else if (is_pci_ioaddr(port))
255 p = (volatile u16 *)PCI_IOMAP(port); 221 p = (volatile u16 *)pci_ioaddr(port);
256 else 222 else
257 p = (volatile u16 *)port2adr(port); 223 p = (volatile u16 *)port2adr(port);
258 224
@@ -264,8 +230,8 @@ void landisk_outsl(unsigned long port, const void *src, unsigned long count)
264{ 230{
265 const u32 *buf = src; 231 const u32 *buf = src;
266 232
267 if (CHECK_SH7751_PCIIO(port)) { 233 if (is_pci_ioaddr(port)) {
268 volatile u32 *p = (volatile u32 *)PCI_IOMAP(port); 234 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
269 235
270 while (count--) 236 while (count--)
271 *p = *buf++; 237 *p = *buf++;
@@ -277,8 +243,8 @@ void __iomem *landisk_ioport_map(unsigned long port, unsigned int size)
277{ 243{
278 if (PXSEG(port)) 244 if (PXSEG(port))
279 return (void __iomem *)port; 245 return (void __iomem *)port;
280 else if (CHECK_SH7751_PCIIO(port)) 246 else if (is_pci_ioaddr(port))
281 return (void __iomem *)PCI_IOMAP(port); 247 return (void __iomem *)pci_ioaddr(port);
282 248
283 return (void __iomem *)port2adr(port); 249 return (void __iomem *)port2adr(port);
284} 250}