diff options
author | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 05:03:34 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 05:03:34 -0400 |
commit | 8599cf059209de22dd3be16816b90f1aad10c74a (patch) | |
tree | 8cd5bdec25431a2797147c3eea11532ec71b6272 /arch/sh/boards/dreamcast | |
parent | ba463937ef75bceaf3943edf01f849257c68623a (diff) |
sh: Cleanup IRQ disabling for hardirq handlers.
The generic hardirq layer already takes care of a lot of the
appropriate locking and disabling for us, no need to duplicate
it in the handlers..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/dreamcast')
-rw-r--r-- | arch/sh/boards/dreamcast/irq.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c index 373a22e48ac4..5bf01f86c20c 100644 --- a/arch/sh/boards/dreamcast/irq.c +++ b/arch/sh/boards/dreamcast/irq.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/irq.h> | 12 | #include <linux/irq.h> |
13 | |||
14 | #include <asm/io.h> | 13 | #include <asm/io.h> |
15 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
16 | #include <asm/dreamcast/sysasic.h> | 15 | #include <asm/dreamcast/sysasic.h> |
@@ -57,29 +56,23 @@ | |||
57 | /* Disable the hardware event by masking its bit in its EMR */ | 56 | /* Disable the hardware event by masking its bit in its EMR */ |
58 | static inline void disable_systemasic_irq(unsigned int irq) | 57 | static inline void disable_systemasic_irq(unsigned int irq) |
59 | { | 58 | { |
60 | unsigned long flags; | ||
61 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); | 59 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); |
62 | __u32 mask; | 60 | __u32 mask; |
63 | 61 | ||
64 | local_irq_save(flags); | ||
65 | mask = inl(emr); | 62 | mask = inl(emr); |
66 | mask &= ~(1 << EVENT_BIT(irq)); | 63 | mask &= ~(1 << EVENT_BIT(irq)); |
67 | outl(mask, emr); | 64 | outl(mask, emr); |
68 | local_irq_restore(flags); | ||
69 | } | 65 | } |
70 | 66 | ||
71 | /* Enable the hardware event by setting its bit in its EMR */ | 67 | /* Enable the hardware event by setting its bit in its EMR */ |
72 | static inline void enable_systemasic_irq(unsigned int irq) | 68 | static inline void enable_systemasic_irq(unsigned int irq) |
73 | { | 69 | { |
74 | unsigned long flags; | ||
75 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); | 70 | __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); |
76 | __u32 mask; | 71 | __u32 mask; |
77 | 72 | ||
78 | local_irq_save(flags); | ||
79 | mask = inl(emr); | 73 | mask = inl(emr); |
80 | mask |= (1 << EVENT_BIT(irq)); | 74 | mask |= (1 << EVENT_BIT(irq)); |
81 | outl(mask, emr); | 75 | outl(mask, emr); |
82 | local_irq_restore(flags); | ||
83 | } | 76 | } |
84 | 77 | ||
85 | /* Acknowledge a hardware event by writing its bit back to its ESR */ | 78 | /* Acknowledge a hardware event by writing its bit back to its ESR */ |