diff options
author | Arnd Bergmann <arnd@arndb.de> | 2009-06-27 09:22:00 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2009-06-27 09:22:00 -0400 |
commit | 9b05706a744da939655525eeeae23f1989b434ce (patch) | |
tree | f1ec0b10bd6c402e47d992ff44fb2c8289d31931 /arch/score/kernel | |
parent | c6067472252c1d6155c7c01c93e0d580342cdb29 (diff) |
score: make irq.h definitions local
Some internal definitions of the interrupt controller are
only needed in irq.c, so move them out of the global irq.h
header. Also add proper __iomem annotations for sparse.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/score/kernel')
-rw-r--r-- | arch/score/kernel/irq.c | 33 |
1 files changed, 23 insertions, 10 deletions
diff --git a/arch/score/kernel/irq.c b/arch/score/kernel/irq.c index 55474e8e9725..47647dde09ca 100644 --- a/arch/score/kernel/irq.c +++ b/arch/score/kernel/irq.c | |||
@@ -29,6 +29,19 @@ | |||
29 | 29 | ||
30 | #include <asm/io.h> | 30 | #include <asm/io.h> |
31 | 31 | ||
32 | /* the interrupt controller is hardcoded at this address */ | ||
33 | #define SCORE_PIC ((u32 __iomem __force *)0x95F50000) | ||
34 | |||
35 | #define INT_PNDL 0 | ||
36 | #define INT_PNDH 1 | ||
37 | #define INT_PRIORITY_M 2 | ||
38 | #define INT_PRIORITY_SG0 4 | ||
39 | #define INT_PRIORITY_SG1 5 | ||
40 | #define INT_PRIORITY_SG2 6 | ||
41 | #define INT_PRIORITY_SG3 7 | ||
42 | #define INT_MASKL 8 | ||
43 | #define INT_MASKH 9 | ||
44 | |||
32 | /* | 45 | /* |
33 | * handles all normal device IRQs | 46 | * handles all normal device IRQs |
34 | */ | 47 | */ |
@@ -44,11 +57,11 @@ static void score_mask(unsigned int irq_nr) | |||
44 | unsigned int irq_source = 63 - irq_nr; | 57 | unsigned int irq_source = 63 - irq_nr; |
45 | 58 | ||
46 | if (irq_source < 32) | 59 | if (irq_source < 32) |
47 | __raw_writel((__raw_readl((void *)P_INT_MASKL) | \ | 60 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \ |
48 | (1 << irq_source)), (void *)P_INT_MASKL); | 61 | (1 << irq_source)), SCORE_PIC + INT_MASKL); |
49 | else | 62 | else |
50 | __raw_writel((__raw_readl((void *)P_INT_MASKH) | \ | 63 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) | \ |
51 | (1 << (irq_source - 32))), (void *)P_INT_MASKH); | 64 | (1 << (irq_source - 32))), SCORE_PIC + INT_MASKH); |
52 | } | 65 | } |
53 | 66 | ||
54 | static void score_unmask(unsigned int irq_nr) | 67 | static void score_unmask(unsigned int irq_nr) |
@@ -56,11 +69,11 @@ static void score_unmask(unsigned int irq_nr) | |||
56 | unsigned int irq_source = 63 - irq_nr; | 69 | unsigned int irq_source = 63 - irq_nr; |
57 | 70 | ||
58 | if (irq_source < 32) | 71 | if (irq_source < 32) |
59 | __raw_writel((__raw_readl((void *)P_INT_MASKL) & \ | 72 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \ |
60 | ~(1 << irq_source)), (void *)P_INT_MASKL); | 73 | ~(1 << irq_source)), SCORE_PIC + INT_MASKL); |
61 | else | 74 | else |
62 | __raw_writel((__raw_readl((void *)P_INT_MASKH) & \ | 75 | __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) & \ |
63 | ~(1 << (irq_source - 32))), (void *)P_INT_MASKH); | 76 | ~(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH); |
64 | } | 77 | } |
65 | 78 | ||
66 | struct irq_chip score_irq_chip = { | 79 | struct irq_chip score_irq_chip = { |
@@ -88,8 +101,8 @@ void __init init_IRQ(void) | |||
88 | memcpy((void *)target_addr, \ | 101 | memcpy((void *)target_addr, \ |
89 | interrupt_exception_vector, IRQ_VECTOR_SIZE); | 102 | interrupt_exception_vector, IRQ_VECTOR_SIZE); |
90 | 103 | ||
91 | __raw_writel(0xffffffff, (void *)P_INT_MASKL); | 104 | __raw_writel(0xffffffff, SCORE_PIC + INT_MASKL); |
92 | __raw_writel(0xffffffff, (void *)P_INT_MASKH); | 105 | __raw_writel(0xffffffff, SCORE_PIC + INT_MASKH); |
93 | 106 | ||
94 | __asm__ __volatile__( | 107 | __asm__ __volatile__( |
95 | "mtcr %0, cr3\n\t" | 108 | "mtcr %0, cr3\n\t" |