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authorJan Glauber <jang@linux.vnet.ibm.com>2012-12-05 08:43:25 -0500
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2012-12-05 09:12:51 -0500
commitc59b9f92653f102856ca7802af551788c143a3a3 (patch)
treeb850ff52a2ac92b258ef6ac51e614dd0d5fd708e /arch/s390
parentbafff1743f2b1bda24daba29c59f755aa2d505b7 (diff)
s390/pci: no msleep in potential IRQ context
The PCI instructions may be used in IRQ context so scheduling is forbidden. Use udelay and shorten the delay since we are now polling. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390')
-rw-r--r--arch/s390/include/asm/pci_insn.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/s390/include/asm/pci_insn.h b/arch/s390/include/asm/pci_insn.h
index 15b88b908e8c..1486a98d5dad 100644
--- a/arch/s390/include/asm/pci_insn.h
+++ b/arch/s390/include/asm/pci_insn.h
@@ -3,7 +3,7 @@
3 3
4#include <linux/delay.h> 4#include <linux/delay.h>
5 5
6#define ZPCI_INSN_BUSY_DELAY 1 /* 1 millisecond */ 6#define ZPCI_INSN_BUSY_DELAY 1 /* 1 microsecond */
7 7
8/* Load/Store status codes */ 8/* Load/Store status codes */
9#define ZPCI_PCI_ST_FUNC_NOT_ENABLED 4 9#define ZPCI_PCI_ST_FUNC_NOT_ENABLED 4
@@ -138,7 +138,7 @@ static inline int rpcit_instr(u64 fn, u64 addr, u64 range)
138 do { 138 do {
139 cc = __rpcit(fn, addr, range, &status); 139 cc = __rpcit(fn, addr, range, &status);
140 if (cc == 2) 140 if (cc == 2)
141 msleep(ZPCI_INSN_BUSY_DELAY); 141 udelay(ZPCI_INSN_BUSY_DELAY);
142 } while (cc == 2); 142 } while (cc == 2);
143 143
144 if (cc) 144 if (cc)
@@ -198,7 +198,7 @@ static inline int pcilg_instr(u64 *data, u64 req, u64 offset)
198 do { 198 do {
199 cc = __pcilg(data, req, offset, &status); 199 cc = __pcilg(data, req, offset, &status);
200 if (cc == 2) 200 if (cc == 2)
201 msleep(ZPCI_INSN_BUSY_DELAY); 201 udelay(ZPCI_INSN_BUSY_DELAY);
202 } while (cc == 2); 202 } while (cc == 2);
203 203
204 if (cc) { 204 if (cc) {
@@ -236,7 +236,7 @@ static inline int pcistg_instr(u64 data, u64 req, u64 offset)
236 do { 236 do {
237 cc = __pcistg(data, req, offset, &status); 237 cc = __pcistg(data, req, offset, &status);
238 if (cc == 2) 238 if (cc == 2)
239 msleep(ZPCI_INSN_BUSY_DELAY); 239 udelay(ZPCI_INSN_BUSY_DELAY);
240 } while (cc == 2); 240 } while (cc == 2);
241 241
242 if (cc) 242 if (cc)
@@ -268,7 +268,7 @@ static inline int pcistb_instr(const u64 *data, u64 req, u64 offset)
268 do { 268 do {
269 cc = __pcistb(data, req, offset, &status); 269 cc = __pcistb(data, req, offset, &status);
270 if (cc == 2) 270 if (cc == 2)
271 msleep(ZPCI_INSN_BUSY_DELAY); 271 udelay(ZPCI_INSN_BUSY_DELAY);
272 } while (cc == 2); 272 } while (cc == 2);
273 273
274 if (cc) 274 if (cc)