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authorHans-Joachim Picht <hans@linux.vnet.ibm.com>2009-06-16 04:30:52 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2009-06-16 04:31:22 -0400
commit155af2f95f905c830688dd0ca7c7cac4107334fd (patch)
tree4304a39e713d1594903e838830c4029715cc7a2a /arch/s390/power/swsusp_asm64.S
parentc369527f18f8560bd3580be2676cb55b54b02ee6 (diff)
[S390] s390: hibernation support for s390
This patch introduces the hibernation backend support to the s390 architecture. Now it is possible to suspend a mainframe Linux guest using the following command: echo disk > /sys/power/state Signed-off-by: Hans-Joachim Picht <hans@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/power/swsusp_asm64.S')
-rw-r--r--arch/s390/power/swsusp_asm64.S199
1 files changed, 199 insertions, 0 deletions
diff --git a/arch/s390/power/swsusp_asm64.S b/arch/s390/power/swsusp_asm64.S
new file mode 100644
index 000000000000..3c74e7d827c9
--- /dev/null
+++ b/arch/s390/power/swsusp_asm64.S
@@ -0,0 +1,199 @@
1/*
2 * S390 64-bit swsusp implementation
3 *
4 * Copyright IBM Corp. 2009
5 *
6 * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
7 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
8 */
9
10#include <asm/page.h>
11#include <asm/ptrace.h>
12#include <asm/asm-offsets.h>
13
14/*
15 * Save register context in absolute 0 lowcore and call swsusp_save() to
16 * create in-memory kernel image. The context is saved in the designated
17 * "store status" memory locations (see POP).
18 * We return from this function twice. The first time during the suspend to
19 * disk process. The second time via the swsusp_arch_resume() function
20 * (see below) in the resume process.
21 * This function runs with disabled interrupts.
22 */
23 .section .text
24 .align 2
25 .globl swsusp_arch_suspend
26swsusp_arch_suspend:
27 stmg %r6,%r15,__SF_GPRS(%r15)
28 lgr %r1,%r15
29 aghi %r15,-STACK_FRAME_OVERHEAD
30 stg %r1,__SF_BACKCHAIN(%r15)
31
32 /* Deactivate DAT */
33 stnsm __SF_EMPTY(%r15),0xfb
34
35 /* Switch off lowcore protection */
36 stctg %c0,%c0,__SF_EMPTY(%r15)
37 ni __SF_EMPTY+4(%r15),0xef
38 lctlg %c0,%c0,__SF_EMPTY(%r15)
39
40 /* Store prefix register on stack */
41 stpx __SF_EMPTY(%r15)
42
43 /* Setup base register for lowcore (absolute 0) */
44 llgf %r1,__SF_EMPTY(%r15)
45
46 /* Get pointer to save area */
47 aghi %r1,0x1000
48
49 /* Store registers */
50 mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
51 stfpc 0x31c(%r1) /* store fpu control */
52 std 0,0x200(%r1) /* store f0 */
53 std 1,0x208(%r1) /* store f1 */
54 std 2,0x210(%r1) /* store f2 */
55 std 3,0x218(%r1) /* store f3 */
56 std 4,0x220(%r1) /* store f4 */
57 std 5,0x228(%r1) /* store f5 */
58 std 6,0x230(%r1) /* store f6 */
59 std 7,0x238(%r1) /* store f7 */
60 std 8,0x240(%r1) /* store f8 */
61 std 9,0x248(%r1) /* store f9 */
62 std 10,0x250(%r1) /* store f10 */
63 std 11,0x258(%r1) /* store f11 */
64 std 12,0x260(%r1) /* store f12 */
65 std 13,0x268(%r1) /* store f13 */
66 std 14,0x270(%r1) /* store f14 */
67 std 15,0x278(%r1) /* store f15 */
68 stam %a0,%a15,0x340(%r1) /* store access registers */
69 stctg %c0,%c15,0x380(%r1) /* store control registers */
70 stmg %r0,%r15,0x280(%r1) /* store general registers */
71
72 stpt 0x328(%r1) /* store timer */
73 stckc 0x330(%r1) /* store clock comparator */
74
75 /* Activate DAT */
76 stosm __SF_EMPTY(%r15),0x04
77
78 /* Set prefix page to zero */
79 xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
80 spx __SF_EMPTY(%r15)
81
82 /* Setup lowcore */
83 brasl %r14,setup_lowcore_early
84
85 /* Save image */
86 brasl %r14,swsusp_save
87
88 /* Switch on lowcore protection */
89 stctg %c0,%c0,__SF_EMPTY(%r15)
90 oi __SF_EMPTY+4(%r15),0x10
91 lctlg %c0,%c0,__SF_EMPTY(%r15)
92
93 /* Restore prefix register and return */
94 lghi %r1,0x1000
95 spx 0x318(%r1)
96 lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
97 lghi %r2,0
98 br %r14
99
100/*
101 * Restore saved memory image to correct place and restore register context.
102 * Then we return to the function that called swsusp_arch_suspend().
103 * swsusp_arch_resume() runs with disabled interrupts.
104 */
105 .globl swsusp_arch_resume
106swsusp_arch_resume:
107 stmg %r6,%r15,__SF_GPRS(%r15)
108 lgr %r1,%r15
109 aghi %r15,-STACK_FRAME_OVERHEAD
110 stg %r1,__SF_BACKCHAIN(%r15)
111
112 /* Save boot cpu number */
113 brasl %r14,smp_get_phys_cpu_id
114 lgr %r10,%r2
115
116 /* Deactivate DAT */
117 stnsm __SF_EMPTY(%r15),0xfb
118
119 /* Switch off lowcore protection */
120 stctg %c0,%c0,__SF_EMPTY(%r15)
121 ni __SF_EMPTY+4(%r15),0xef
122 lctlg %c0,%c0,__SF_EMPTY(%r15)
123
124 /* Set prefix page to zero */
125 xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
126 spx __SF_EMPTY(%r15)
127
128 /* Restore saved image */
129 larl %r1,restore_pblist
130 lg %r1,0(%r1)
131 ltgr %r1,%r1
132 jz 2f
1330:
134 lg %r2,8(%r1)
135 lg %r4,0(%r1)
136 lghi %r3,PAGE_SIZE
137 lghi %r5,PAGE_SIZE
1381:
139 mvcle %r2,%r4,0
140 jo 1b
141 lg %r1,16(%r1)
142 ltgr %r1,%r1
143 jnz 0b
1442:
145 ptlb /* flush tlb */
146
147 /* Restore registers */
148 lghi %r13,0x1000 /* %r1 = pointer to save arae */
149
150 spt 0x328(%r13) /* reprogram timer */
151 //sckc 0x330(%r13) /* set clock comparator */
152
153 lctlg %c0,%c15,0x380(%r13) /* load control registers */
154 lam %a0,%a15,0x340(%r13) /* load access registers */
155
156 lfpc 0x31c(%r13) /* load fpu control */
157 ld 0,0x200(%r13) /* load f0 */
158 ld 1,0x208(%r13) /* load f1 */
159 ld 2,0x210(%r13) /* load f2 */
160 ld 3,0x218(%r13) /* load f3 */
161 ld 4,0x220(%r13) /* load f4 */
162 ld 5,0x228(%r13) /* load f5 */
163 ld 6,0x230(%r13) /* load f6 */
164 ld 7,0x238(%r13) /* load f7 */
165 ld 8,0x240(%r13) /* load f8 */
166 ld 9,0x248(%r13) /* load f9 */
167 ld 10,0x250(%r13) /* load f10 */
168 ld 11,0x258(%r13) /* load f11 */
169 ld 12,0x260(%r13) /* load f12 */
170 ld 13,0x268(%r13) /* load f13 */
171 ld 14,0x270(%r13) /* load f14 */
172 ld 15,0x278(%r13) /* load f15 */
173
174 /* Load old stack */
175 lg %r15,0x2f8(%r13)
176
177 /* Pointer to save arae */
178 lghi %r13,0x1000
179
180 /* Switch CPUs */
181 lgr %r2,%r10 /* get cpu id */
182 llgf %r3,0x318(%r13)
183 brasl %r14,smp_switch_boot_cpu_in_resume
184
185 /* Restore prefix register */
186 spx 0x318(%r13)
187
188 /* Switch on lowcore protection */
189 stctg %c0,%c0,__SF_EMPTY(%r15)
190 oi __SF_EMPTY+4(%r15),0x10
191 lctlg %c0,%c0,__SF_EMPTY(%r15)
192
193 /* Activate DAT */
194 stosm __SF_EMPTY(%r15),0x04
195
196 /* Return 0 */
197 lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
198 lghi %r2,0
199 br %r14