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authorMartin Schwidefsky <schwidefsky@de.ibm.com>2012-03-11 11:59:25 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2012-03-11 11:59:27 -0400
commit7e180bd8020d213bb0de15c3606968f8a9262439 (patch)
treed9c15fa4c129b723f80cc46cd87cbcb12eb77c7b /arch/s390/kernel
parent4fdf7f432cc5db9531c03b9689b36a6395935fbc (diff)
[S390] rename lowcore field
The 16 bit value at the lowcore location with offset 0x84 is the cpu address that is associated with an external interrupt. Rename the field from cpu_addr to ext_cpu_addr to make that clear. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel')
-rw-r--r--arch/s390/kernel/asm-offsets.c2
-rw-r--r--arch/s390/kernel/entry.S2
-rw-r--r--arch/s390/kernel/entry64.S2
-rw-r--r--arch/s390/kernel/swsusp_asm64.S4
4 files changed, 5 insertions, 5 deletions
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index 6e6a72e66d60..530ae0e8e38f 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -78,7 +78,7 @@ int main(void)
78 BLANK(); 78 BLANK();
79 /* lowcore offsets */ 79 /* lowcore offsets */
80 DEFINE(__LC_EXT_PARAMS, offsetof(struct _lowcore, ext_params)); 80 DEFINE(__LC_EXT_PARAMS, offsetof(struct _lowcore, ext_params));
81 DEFINE(__LC_CPU_ADDRESS, offsetof(struct _lowcore, cpu_addr)); 81 DEFINE(__LC_EXT_CPU_ADDR, offsetof(struct _lowcore, ext_cpu_addr));
82 DEFINE(__LC_EXT_INT_CODE, offsetof(struct _lowcore, ext_int_code)); 82 DEFINE(__LC_EXT_INT_CODE, offsetof(struct _lowcore, ext_int_code));
83 DEFINE(__LC_SVC_ILC, offsetof(struct _lowcore, svc_ilc)); 83 DEFINE(__LC_SVC_ILC, offsetof(struct _lowcore, svc_ilc));
84 DEFINE(__LC_SVC_INT_CODE, offsetof(struct _lowcore, svc_code)); 84 DEFINE(__LC_SVC_INT_CODE, offsetof(struct _lowcore, svc_code));
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 3705700ed374..5f437b830da5 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -606,7 +606,7 @@ ext_skip:
606 stm %r8,%r9,__PT_PSW(%r11) 606 stm %r8,%r9,__PT_PSW(%r11)
607 TRACE_IRQS_OFF 607 TRACE_IRQS_OFF
608 lr %r2,%r11 # pass pointer to pt_regs 608 lr %r2,%r11 # pass pointer to pt_regs
609 l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code 609 l %r3,__LC_EXT_CPU_ADDR # get cpu address + interruption code
610 l %r4,__LC_EXT_PARAMS # get external parameters 610 l %r4,__LC_EXT_PARAMS # get external parameters
611 l %r1,BASED(.Ldo_extint) 611 l %r1,BASED(.Ldo_extint)
612 basr %r14,%r1 # call do_extint 612 basr %r14,%r1 # call do_extint
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 412a7b8783d7..bacbd2848d40 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -625,7 +625,7 @@ ext_skip:
625 TRACE_IRQS_OFF 625 TRACE_IRQS_OFF
626 lghi %r1,4096 626 lghi %r1,4096
627 lgr %r2,%r11 # pass pointer to pt_regs 627 lgr %r2,%r11 # pass pointer to pt_regs
628 llgf %r3,__LC_CPU_ADDRESS # get cpu address + interruption code 628 llgf %r3,__LC_EXT_CPU_ADDR # get cpu address + interruption code
629 llgf %r4,__LC_EXT_PARAMS # get external parameter 629 llgf %r4,__LC_EXT_PARAMS # get external parameter
630 lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter 630 lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter
631 brasl %r14,do_extint 631 brasl %r14,do_extint
diff --git a/arch/s390/kernel/swsusp_asm64.S b/arch/s390/kernel/swsusp_asm64.S
index acb78cdee896..2ef39d1519a9 100644
--- a/arch/s390/kernel/swsusp_asm64.S
+++ b/arch/s390/kernel/swsusp_asm64.S
@@ -42,7 +42,7 @@ ENTRY(swsusp_arch_suspend)
42 lghi %r1,0x1000 42 lghi %r1,0x1000
43 43
44 /* Save CPU address */ 44 /* Save CPU address */
45 stap __LC_CPU_ADDRESS(%r0) 45 stap __LC_EXT_CPU_ADDR(%r0)
46 46
47 /* Store registers */ 47 /* Store registers */
48 mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */ 48 mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
@@ -173,7 +173,7 @@ pgm_check_entry:
173 larl %r1,.Lresume_cpu /* Resume CPU address: r2 */ 173 larl %r1,.Lresume_cpu /* Resume CPU address: r2 */
174 stap 0(%r1) 174 stap 0(%r1)
175 llgh %r2,0(%r1) 175 llgh %r2,0(%r1)
176 llgh %r1,__LC_CPU_ADDRESS(%r0) /* Suspend CPU address: r1 */ 176 llgh %r1,__LC_EXT_CPU_ADDR(%r0) /* Suspend CPU address: r1 */
177 cgr %r1,%r2 177 cgr %r1,%r2
178 je restore_registers /* r1 = r2 -> nothing to do */ 178 je restore_registers /* r1 = r2 -> nothing to do */
179 larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */ 179 larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */