diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2010-05-17 19:30:58 -0400 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2010-05-17 19:30:58 -0400 |
| commit | 0b28330e39bbe0ffee4c56b09fc415fcec595ea3 (patch) | |
| tree | fcf504879883763557e696eff81427b1ab78f76b /arch/s390/kernel/head64.S | |
| parent | 058276303dbc4ed089c1f7dad0871810b1f5ddf1 (diff) | |
| parent | caa20d974c86af496b419eef70010e63b7fab7ac (diff) | |
Merge branch 'ioat' into dmaengine
Diffstat (limited to 'arch/s390/kernel/head64.S')
| -rw-r--r-- | arch/s390/kernel/head64.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S index 39580e768658..1f70970de0aa 100644 --- a/arch/s390/kernel/head64.S +++ b/arch/s390/kernel/head64.S | |||
| @@ -21,7 +21,6 @@ startup_continue: | |||
| 21 | larl %r1,sched_clock_base_cc | 21 | larl %r1,sched_clock_base_cc |
| 22 | mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK | 22 | mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK |
| 23 | larl %r13,.LPG1 # get base | 23 | larl %r13,.LPG1 # get base |
| 24 | lmh %r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half | ||
| 25 | lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers | 24 | lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers |
| 26 | lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area | 25 | lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area |
| 27 | # move IPL device to lowcore | 26 | # move IPL device to lowcore |
| @@ -67,7 +66,6 @@ startup_continue: | |||
| 67 | .L4malign:.quad 0xffffffffffc00000 | 66 | .L4malign:.quad 0xffffffffffc00000 |
| 68 | .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 | 67 | .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 |
| 69 | .Lnop: .long 0x07000700 | 68 | .Lnop: .long 0x07000700 |
| 70 | .Lzero64:.fill 16,4,0x0 | ||
| 71 | .Lparmaddr: | 69 | .Lparmaddr: |
| 72 | .quad PARMAREA | 70 | .quad PARMAREA |
| 73 | .align 64 | 71 | .align 64 |