litmus-rt.git - The LITMUS^RT kernel.

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author	David Lopo <lopo.david@gmail.com>	2008-04-29 05:14:38 -0400
committer	Greg Kroah-Hartman <gregkh@suse.de>	2008-05-02 13:25:58 -0400
commit	62fd2cac5bf5cf9e6fcb2fc40b32e7271e605c53 (patch)
tree	8e46c093b1c3191a57a14acb78f58a18773483ab /arch/s390/kernel/debug.c
parent	a5e54b0dbb6a099793caf508b1d6c7d82f965ec3 (diff)

USB GADGET/PERIPHERAL: g_file_storage Bulk-Only Transport compliance, clear-feature ignore

Gadget tells controller driver to ignore Clear-Feature(HALT_ENDPOINT) Signed-off-by: David Lopo <lopo.david@gmail.com> Acked-by: Alan Stern <stern@rowland.harvard.edu>

Diffstat (limited to 'arch/s390/kernel/debug.c')

0 files changed, 0 insertions, 0 deletions

/* * linux/arch/arm/mach-sa1100/badge4.c * * BadgePAD 4 specific initialization * * Tim Connors <connors@hpl.hp.com> * Christopher Hoover <ch@hpl.hp.com> * * Copyright (C) 2002 Hewlett-Packard Company * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */ #include <linux/module.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/tty.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/errno.h> #include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/setup.h> #include <mach/irqs.h> #include <asm/mach/arch.h> #include <asm/mach/flash.h> #include <asm/mach/map.h> #include <asm/hardware/sa1111.h> #include <asm/mach/serial_sa1100.h> #include <mach/badge4.h> #include "generic.h" static struct resource sa1111_resources[] = { [0] = { .start = BADGE4_SA1111_BASE, .end = BADGE4_SA1111_BASE + 0x00001fff, .flags = IORESOURCE_MEM, }, [1] = { .start = BADGE4_IRQ_GPIO_SA1111, .end = BADGE4_IRQ_GPIO_SA1111, .flags = IORESOURCE_IRQ, }, }; static struct sa1111_platform_data sa1111_info = { .irq_base = IRQ_BOARD_END, }; static u64 sa1111_dmamask = 0xffffffffUL; static struct platform_device sa1111_device = { .name = "sa1111", .id = 0, .dev = { .dma_mask = &sa1111_dmamask, .coherent_dma_mask = 0xffffffff, .platform_data = &sa1111_info, }, .num_resources = ARRAY_SIZE(sa1111_resources), .resource = sa1111_resources, }; static struct platform_device *devices[] __initdata = { &sa1111_device, }; static int __init badge4_sa1111_init(void) { /* * Ensure that the memory bus request/grant signals are setup, * and the grant is held in its inactive state */ sa1110_mb_disable(); /* * Probe for SA1111. */ return platform_add_devices(devices, ARRAY_SIZE(devices)); } /* * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit) * Eight 4 KiW Parameter Bottom Blocks (64 KiB) * Sixty-three 32 KiW Main Blocks (4032 Ki b) * * <or> * * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit) * Eight 4 KiW Parameter Bottom Blocks (64 KiB) * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b) */ static struct mtd_partition badge4_partitions[] = { { .name = "BLOB boot loader", .offset = 0, .size = 0x0000A000 }, { .name = "params", .offset = MTDPART_OFS_APPEND, .size = 0x00006000 }, { .name = "root", .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL } }; static struct flash_platform_data badge4_flash_data = { .map_name = "cfi_probe", .parts = badge4_partitions, .nr_parts = ARRAY_SIZE(badge4_partitions), }; static struct resource badge4_flash_resource = { .start = SA1100_CS0_PHYS, .end = SA1100_CS0_PHYS + SZ_64M - 1, .flags = IORESOURCE_MEM, }; static int five_v_on __initdata = 0; static int __init five_v_on_setup(char *ignore) { five_v_on = 1; return 1; } __setup("five_v_on", five_v_on_setup); static int __init badge4_init(void) { int ret; if (!machine_is_badge4()) return -ENODEV; /* LCD */ GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 | BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 | BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID | BADGE4_GPIO_GPC_VID); GPDR &= ~BADGE4_GPIO_INT_VID; GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 | BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 | BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID | BADGE4_GPIO_GPC_VID); /* SDRAM SPD i2c */ GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); /* uart */ GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); /* CPLD muxsel0 input for mux/adc chip select */ GPCR = BADGE4_GPIO_MUXSEL0; GPDR |= BADGE4_GPIO_MUXSEL0; /* test points: J5, J6 as inputs, J7 outputs */ GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6); GPCR = BADGE4_GPIO_TESTPT_J7; GPDR |= BADGE4_GPIO_TESTPT_J7; /* 5V supply rail. */ GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ GPDR |= BADGE4_GPIO_PCMEN5V; /* CPLD sdram type inputs; set up by blob */ //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0); printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n", !!(GPLR & BADGE4_GPIO_SDTYP1), !!(GPLR & BADGE4_GPIO_SDTYP0)); /* SA1111 reset pin; set up by blob */ //GPSR = BADGE4_GPIO_SA1111_NRST; //GPDR |= BADGE4_GPIO_SA1111_NRST; /* power management cruft */ PGSR = 0; PWER = 0; PCFR = 0; PSDR = 0; PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */ PWER |= PWER_RTC; /* wake up if rtc fires */ /* drive sa1111_nrst during sleep */ PGSR |= BADGE4_GPIO_SA1111_NRST; /* drive CPLD as is during sleep */


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