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authorHeiko Carstens <heiko.carstens@de.ibm.com>2010-02-26 16:37:35 -0500
committerMartin Schwidefsky <sky@mschwide.boeblingen.de.ibm.com>2010-02-26 16:37:30 -0500
commita93b8ec1df1f0ad75d036dbc0fdef2e0ccb7be02 (patch)
treea68ab05bfd48eb637e50e2294005d6e079098a7e /arch/s390/include
parent2c2df118a6440748e6fd71a510a66ee708c31494 (diff)
[S390] smp: rework sigp code
Rename signal_processor* functions to sigp*. Add raw variants of each version, so we can get rid of the hacks played in smp code which establish temporary cpu logical mappings so they could call the sigp functions. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include')
-rw-r--r--arch/s390/include/asm/sigp.h100
1 files changed, 49 insertions, 51 deletions
diff --git a/arch/s390/include/asm/sigp.h b/arch/s390/include/asm/sigp.h
index f72d611f7e13..8aa46ce4229c 100644
--- a/arch/s390/include/asm/sigp.h
+++ b/arch/s390/include/asm/sigp.h
@@ -1,24 +1,19 @@
1/* 1/*
2 * include/asm-s390/sigp.h 2 * Routines and structures for signalling other processors.
3 * 3 *
4 * S390 version 4 * Copyright IBM Corp. 1999,2010
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 5 * Author(s): Denis Joseph Barrow,
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Martin Schwidefsky (schwidefsky@de.ibm.com) 7 * Heiko Carstens <heiko.carstens@de.ibm.com>,
8 * Heiko Carstens (heiko.carstens@de.ibm.com)
9 *
10 * sigp.h by D.J. Barrow (c) IBM 1999
11 * contains routines / structures for signalling other S/390 processors in an
12 * SMP configuration.
13 */ 8 */
14 9
15#ifndef __SIGP__ 10#ifndef __ASM_SIGP_H
16#define __SIGP__ 11#define __ASM_SIGP_H
17 12
18#include <asm/system.h> 13#include <asm/system.h>
19 14
20/* get real cpu address from logical cpu number */ 15/* Get real cpu address from logical cpu number. */
21extern int __cpu_logical_map[]; 16extern unsigned short __cpu_logical_map[];
22 17
23static inline int cpu_logical_map(int cpu) 18static inline int cpu_logical_map(int cpu)
24{ 19{
@@ -29,8 +24,7 @@ static inline int cpu_logical_map(int cpu)
29#endif 24#endif
30} 25}
31 26
32typedef enum 27enum {
33{
34 sigp_unassigned=0x0, 28 sigp_unassigned=0x0,
35 sigp_sense, 29 sigp_sense,
36 sigp_external_call, 30 sigp_external_call,
@@ -47,89 +41,93 @@ typedef enum
47 sigp_set_prefix, 41 sigp_set_prefix,
48 sigp_store_status_at_address, 42 sigp_store_status_at_address,
49 sigp_store_extended_status_at_address 43 sigp_store_extended_status_at_address
50} sigp_order_code; 44};
51
52typedef __u32 sigp_status_word;
53 45
54typedef enum 46enum {
55{
56 sigp_order_code_accepted=0, 47 sigp_order_code_accepted=0,
57 sigp_status_stored, 48 sigp_status_stored,
58 sigp_busy, 49 sigp_busy,
59 sigp_not_operational 50 sigp_not_operational
60} sigp_ccode; 51};
61
62 52
63/* 53/*
64 * Definitions for the external call 54 * Definitions for external call.
65 */ 55 */
66 56enum {
67/* 'Bit' signals, asynchronous */ 57 ec_schedule = 0,
68typedef enum
69{
70 ec_schedule=0,
71 ec_call_function, 58 ec_call_function,
72 ec_call_function_single, 59 ec_call_function_single,
73 ec_bit_last 60 ec_bit_last
74} ec_bit_sig; 61};
75 62
76/* 63/*
77 * Signal processor 64 * Signal processor.
78 */ 65 */
79static inline sigp_ccode 66static inline int raw_sigp(u16 cpu, int order)
80signal_processor(__u16 cpu_addr, sigp_order_code order_code)
81{ 67{
82 register unsigned long reg1 asm ("1") = 0; 68 register unsigned long reg1 asm ("1") = 0;
83 sigp_ccode ccode; 69 int ccode;
84 70
85 asm volatile( 71 asm volatile(
86 " sigp %1,%2,0(%3)\n" 72 " sigp %1,%2,0(%3)\n"
87 " ipm %0\n" 73 " ipm %0\n"
88 " srl %0,28\n" 74 " srl %0,28\n"
89 : "=d" (ccode) 75 : "=d" (ccode)
90 : "d" (reg1), "d" (cpu_logical_map(cpu_addr)), 76 : "d" (reg1), "d" (cpu),
91 "a" (order_code) : "cc" , "memory"); 77 "a" (order) : "cc" , "memory");
92 return ccode; 78 return ccode;
93} 79}
94 80
95/* 81/*
96 * Signal processor with parameter 82 * Signal processor with parameter.
97 */ 83 */
98static inline sigp_ccode 84static inline int raw_sigp_p(u32 parameter, u16 cpu, int order)
99signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code)
100{ 85{
101 register unsigned int reg1 asm ("1") = parameter; 86 register unsigned int reg1 asm ("1") = parameter;
102 sigp_ccode ccode; 87 int ccode;
103 88
104 asm volatile( 89 asm volatile(
105 " sigp %1,%2,0(%3)\n" 90 " sigp %1,%2,0(%3)\n"
106 " ipm %0\n" 91 " ipm %0\n"
107 " srl %0,28\n" 92 " srl %0,28\n"
108 : "=d" (ccode) 93 : "=d" (ccode)
109 : "d" (reg1), "d" (cpu_logical_map(cpu_addr)), 94 : "d" (reg1), "d" (cpu),
110 "a" (order_code) : "cc" , "memory"); 95 "a" (order) : "cc" , "memory");
111 return ccode; 96 return ccode;
112} 97}
113 98
114/* 99/*
115 * Signal processor with parameter and return status 100 * Signal processor with parameter and return status.
116 */ 101 */
117static inline sigp_ccode 102static inline int raw_sigp_ps(u32 *status, u32 parm, u16 cpu, int order)
118signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr,
119 sigp_order_code order_code)
120{ 103{
121 register unsigned int reg1 asm ("1") = parameter; 104 register unsigned int reg1 asm ("1") = parm;
122 sigp_ccode ccode; 105 int ccode;
123 106
124 asm volatile( 107 asm volatile(
125 " sigp %1,%2,0(%3)\n" 108 " sigp %1,%2,0(%3)\n"
126 " ipm %0\n" 109 " ipm %0\n"
127 " srl %0,28\n" 110 " srl %0,28\n"
128 : "=d" (ccode), "+d" (reg1) 111 : "=d" (ccode), "+d" (reg1)
129 : "d" (cpu_logical_map(cpu_addr)), "a" (order_code) 112 : "d" (cpu), "a" (order)
130 : "cc" , "memory"); 113 : "cc" , "memory");
131 *statusptr = reg1; 114 *status = reg1;
132 return ccode; 115 return ccode;
133} 116}
134 117
135#endif /* __SIGP__ */ 118static inline int sigp(int cpu, int order)
119{
120 return raw_sigp(cpu_logical_map(cpu), order);
121}
122
123static inline int sigp_p(u32 parameter, int cpu, int order)
124{
125 return raw_sigp_p(parameter, cpu_logical_map(cpu), order);
126}
127
128static inline int sigp_ps(u32 *status, u32 parm, int cpu, int order)
129{
130 return raw_sigp_ps(status, parm, cpu_logical_map(cpu), order);
131}
132
133#endif /* __ASM_SIGP_H */