diff options
author | frank.blaschka@de.ibm.com <frank.blaschka@de.ibm.com> | 2011-08-07 21:33:55 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-08-13 04:10:16 -0400 |
commit | 104ea556ee7f40039c9c635d0c267b1fde084a81 (patch) | |
tree | 5b4af497551a3f2e2cb2f24030d028392aae07e0 /arch/s390/include | |
parent | 3881ac441f642d56503818123446f7298442236b (diff) |
qdio: support asynchronous delivery of storage blocks
This patch introduces support for asynchronous delivery of storage blocks for
Hipersockets. Upper layers may exploit this functionality to reuse SBALs for
which the delivery status is still pending.
Signed-off-by: Einar Lueck <elelueck@de.ibm.com>
Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: Frank Blaschka <frank.blaschka@de.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/s390/include')
-rw-r--r-- | arch/s390/include/asm/qdio.h | 68 |
1 files changed, 65 insertions, 3 deletions
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h index 15c97625df8d..3881e9499e17 100644 --- a/arch/s390/include/asm/qdio.h +++ b/arch/s390/include/asm/qdio.h | |||
@@ -123,6 +123,40 @@ struct slibe { | |||
123 | }; | 123 | }; |
124 | 124 | ||
125 | /** | 125 | /** |
126 | * struct qaob - queue asynchronous operation block | ||
127 | * @res0: reserved parameters | ||
128 | * @res1: reserved parameter | ||
129 | * @res2: reserved parameter | ||
130 | * @res3: reserved parameter | ||
131 | * @aorc: asynchronous operation return code | ||
132 | * @flags: internal flags | ||
133 | * @cbtbs: control block type | ||
134 | * @sb_count: number of storage blocks | ||
135 | * @sba: storage block element addresses | ||
136 | * @dcount: size of storage block elements | ||
137 | * @user0: user defineable value | ||
138 | * @res4: reserved paramater | ||
139 | * @user1: user defineable value | ||
140 | * @user2: user defineable value | ||
141 | */ | ||
142 | struct qaob { | ||
143 | u64 res0[6]; | ||
144 | u8 res1; | ||
145 | u8 res2; | ||
146 | u8 res3; | ||
147 | u8 aorc; | ||
148 | u8 flags; | ||
149 | u16 cbtbs; | ||
150 | u8 sb_count; | ||
151 | u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER]; | ||
152 | u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER]; | ||
153 | u64 user0; | ||
154 | u64 res4[2]; | ||
155 | u64 user1; | ||
156 | u64 user2; | ||
157 | } __attribute__ ((packed, aligned(256))); | ||
158 | |||
159 | /** | ||
126 | * struct slib - storage list information block (SLIB) | 160 | * struct slib - storage list information block (SLIB) |
127 | * @nsliba: next SLIB address (if any) | 161 | * @nsliba: next SLIB address (if any) |
128 | * @sla: SL address | 162 | * @sla: SL address |
@@ -225,6 +259,31 @@ struct slsb { | |||
225 | #define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010 | 259 | #define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010 |
226 | #define CHSC_AC2_DATA_DIV_ENABLED 0x0002 | 260 | #define CHSC_AC2_DATA_DIV_ENABLED 0x0002 |
227 | 261 | ||
262 | /** | ||
263 | * struct qdio_outbuf_state - SBAL related asynchronous operation information | ||
264 | * (for communication with upper layer programs) | ||
265 | * (only required for use with completion queues) | ||
266 | * @flags: flags indicating state of buffer | ||
267 | * @aob: pointer to QAOB used for the particular SBAL | ||
268 | * @user: pointer to upper layer program's state information related to SBAL | ||
269 | * (stored in user1 data of QAOB) | ||
270 | */ | ||
271 | struct qdio_outbuf_state { | ||
272 | u8 flags; | ||
273 | struct qaob *aob; | ||
274 | void *user; | ||
275 | }; | ||
276 | |||
277 | #define QDIO_OUTBUF_STATE_FLAG_NONE 0x00 | ||
278 | #define QDIO_OUTBUF_STATE_FLAG_PENDING 0x01 | ||
279 | |||
280 | #define CHSC_AC1_INITIATE_INPUTQ 0x80 | ||
281 | |||
282 | #define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010 | ||
283 | #define CHSC_AC2_DATA_DIV_ENABLED 0x0002 | ||
284 | |||
285 | #define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000 | ||
286 | |||
228 | struct qdio_ssqd_desc { | 287 | struct qdio_ssqd_desc { |
229 | u8 flags; | 288 | u8 flags; |
230 | u8:8; | 289 | u8:8; |
@@ -243,8 +302,7 @@ struct qdio_ssqd_desc { | |||
243 | u64 sch_token; | 302 | u64 sch_token; |
244 | u8 mro; | 303 | u8 mro; |
245 | u8 mri; | 304 | u8 mri; |
246 | u8:8; | 305 | u16 qdioac3; |
247 | u8 sbalic; | ||
248 | u16:16; | 306 | u16:16; |
249 | u8:8; | 307 | u8:8; |
250 | u8 mmwc; | 308 | u8 mmwc; |
@@ -280,9 +338,11 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int, | |||
280 | * @no_output_qs: number of output queues | 338 | * @no_output_qs: number of output queues |
281 | * @input_handler: handler to be called for input queues | 339 | * @input_handler: handler to be called for input queues |
282 | * @output_handler: handler to be called for output queues | 340 | * @output_handler: handler to be called for output queues |
341 | * @queue_start_poll: polling handlers (one per input queue or NULL) | ||
283 | * @int_parm: interruption parameter | 342 | * @int_parm: interruption parameter |
284 | * @input_sbal_addr_array: address of no_input_qs * 128 pointers | 343 | * @input_sbal_addr_array: address of no_input_qs * 128 pointers |
285 | * @output_sbal_addr_array: address of no_output_qs * 128 pointers | 344 | * @output_sbal_addr_array: address of no_output_qs * 128 pointers |
345 | * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL) | ||
286 | */ | 346 | */ |
287 | struct qdio_initialize { | 347 | struct qdio_initialize { |
288 | struct ccw_device *cdev; | 348 | struct ccw_device *cdev; |
@@ -297,11 +357,12 @@ struct qdio_initialize { | |||
297 | unsigned int no_output_qs; | 357 | unsigned int no_output_qs; |
298 | qdio_handler_t *input_handler; | 358 | qdio_handler_t *input_handler; |
299 | qdio_handler_t *output_handler; | 359 | qdio_handler_t *output_handler; |
300 | void (*queue_start_poll) (struct ccw_device *, int, unsigned long); | 360 | void (**queue_start_poll) (struct ccw_device *, int, unsigned long); |
301 | int scan_threshold; | 361 | int scan_threshold; |
302 | unsigned long int_parm; | 362 | unsigned long int_parm; |
303 | void **input_sbal_addr_array; | 363 | void **input_sbal_addr_array; |
304 | void **output_sbal_addr_array; | 364 | void **output_sbal_addr_array; |
365 | struct qdio_outbuf_state *output_sbal_state_array; | ||
305 | }; | 366 | }; |
306 | 367 | ||
307 | #define QDIO_STATE_INACTIVE 0x00000002 /* after qdio_cleanup */ | 368 | #define QDIO_STATE_INACTIVE 0x00000002 /* after qdio_cleanup */ |
@@ -316,6 +377,7 @@ struct qdio_initialize { | |||
316 | extern int qdio_allocate(struct qdio_initialize *); | 377 | extern int qdio_allocate(struct qdio_initialize *); |
317 | extern int qdio_establish(struct qdio_initialize *); | 378 | extern int qdio_establish(struct qdio_initialize *); |
318 | extern int qdio_activate(struct ccw_device *); | 379 | extern int qdio_activate(struct ccw_device *); |
380 | extern void qdio_release_aob(struct qaob *); | ||
319 | extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int, | 381 | extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int, |
320 | unsigned int); | 382 | unsigned int); |
321 | extern int qdio_start_irq(struct ccw_device *, int); | 383 | extern int qdio_start_irq(struct ccw_device *, int); |