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authorHeiko Carstens <heiko.carstens@de.ibm.com>2015-02-12 07:08:27 -0500
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2015-03-25 06:49:33 -0400
commit5a79859ae0f35d25c67a03e82bf0c80592f16a39 (patch)
tree37264d49f069812f19ced94e6ae171814fb7e498 /arch/s390/include/asm/lowcore.h
parent1833c9f647e9bda1cd24653ff8f9c207b5f5b911 (diff)
s390: remove 31 bit support
Remove the 31 bit support in order to reduce maintenance cost and effectively remove dead code. Since a couple of years there is no distribution left that comes with a 31 bit kernel. The 31 bit kernel also has been broken since more than a year before anybody noticed. In addition I added a removal warning to the kernel shown at ipl for 5 minutes: a960062e5826 ("s390: add 31 bit warning message") which let everybody know about the plan to remove 31 bit code. We didn't get any response. Given that the last 31 bit only machine was introduced in 1999 let's remove the code. Anybody with 31 bit user space code can still use the compat mode. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include/asm/lowcore.h')
-rw-r--r--arch/s390/include/asm/lowcore.h159
1 files changed, 0 insertions, 159 deletions
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 34fbcac61133..663f23e37460 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -13,163 +13,6 @@
13#include <asm/cpu.h> 13#include <asm/cpu.h>
14#include <asm/types.h> 14#include <asm/types.h>
15 15
16#ifdef CONFIG_32BIT
17
18#define LC_ORDER 0
19#define LC_PAGES 1
20
21struct save_area {
22 u32 ext_save;
23 u64 timer;
24 u64 clk_cmp;
25 u8 pad1[24];
26 u8 psw[8];
27 u32 pref_reg;
28 u8 pad2[20];
29 u32 acc_regs[16];
30 u64 fp_regs[4];
31 u32 gp_regs[16];
32 u32 ctrl_regs[16];
33} __packed;
34
35struct save_area_ext {
36 struct save_area sa;
37 __vector128 vx_regs[32];
38};
39
40struct _lowcore {
41 psw_t restart_psw; /* 0x0000 */
42 psw_t restart_old_psw; /* 0x0008 */
43 __u8 pad_0x0010[0x0014-0x0010]; /* 0x0010 */
44 __u32 ipl_parmblock_ptr; /* 0x0014 */
45 psw_t external_old_psw; /* 0x0018 */
46 psw_t svc_old_psw; /* 0x0020 */
47 psw_t program_old_psw; /* 0x0028 */
48 psw_t mcck_old_psw; /* 0x0030 */
49 psw_t io_old_psw; /* 0x0038 */
50 __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
51 psw_t external_new_psw; /* 0x0058 */
52 psw_t svc_new_psw; /* 0x0060 */
53 psw_t program_new_psw; /* 0x0068 */
54 psw_t mcck_new_psw; /* 0x0070 */
55 psw_t io_new_psw; /* 0x0078 */
56 __u32 ext_params; /* 0x0080 */
57 __u16 ext_cpu_addr; /* 0x0084 */
58 __u16 ext_int_code; /* 0x0086 */
59 __u16 svc_ilc; /* 0x0088 */
60 __u16 svc_code; /* 0x008a */
61 __u16 pgm_ilc; /* 0x008c */
62 __u16 pgm_code; /* 0x008e */
63 __u32 trans_exc_code; /* 0x0090 */
64 __u16 mon_class_num; /* 0x0094 */
65 __u8 per_code; /* 0x0096 */
66 __u8 per_atmid; /* 0x0097 */
67 __u32 per_address; /* 0x0098 */
68 __u32 monitor_code; /* 0x009c */
69 __u8 exc_access_id; /* 0x00a0 */
70 __u8 per_access_id; /* 0x00a1 */
71 __u8 op_access_id; /* 0x00a2 */
72 __u8 ar_mode_id; /* 0x00a3 */
73 __u8 pad_0x00a4[0x00b8-0x00a4]; /* 0x00a4 */
74 __u16 subchannel_id; /* 0x00b8 */
75 __u16 subchannel_nr; /* 0x00ba */
76 __u32 io_int_parm; /* 0x00bc */
77 __u32 io_int_word; /* 0x00c0 */
78 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
79 __u32 stfl_fac_list; /* 0x00c8 */
80 __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
81 __u32 extended_save_area_addr; /* 0x00d4 */
82 __u32 cpu_timer_save_area[2]; /* 0x00d8 */
83 __u32 clock_comp_save_area[2]; /* 0x00e0 */
84 __u32 mcck_interruption_code[2]; /* 0x00e8 */
85 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
86 __u32 external_damage_code; /* 0x00f4 */
87 __u32 failing_storage_address; /* 0x00f8 */
88 __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
89 psw_t psw_save_area; /* 0x0100 */
90 __u32 prefixreg_save_area; /* 0x0108 */
91 __u8 pad_0x010c[0x0120-0x010c]; /* 0x010c */
92
93 /* CPU register save area: defined by architecture */
94 __u32 access_regs_save_area[16]; /* 0x0120 */
95 __u32 floating_pt_save_area[8]; /* 0x0160 */
96 __u32 gpregs_save_area[16]; /* 0x0180 */
97 __u32 cregs_save_area[16]; /* 0x01c0 */
98
99 /* Save areas. */
100 __u32 save_area_sync[8]; /* 0x0200 */
101 __u32 save_area_async[8]; /* 0x0220 */
102 __u32 save_area_restart[1]; /* 0x0240 */
103
104 /* CPU flags. */
105 __u32 cpu_flags; /* 0x0244 */
106
107 /* Return psws. */
108 psw_t return_psw; /* 0x0248 */
109 psw_t return_mcck_psw; /* 0x0250 */
110
111 /* CPU time accounting values */
112 __u64 sync_enter_timer; /* 0x0258 */
113 __u64 async_enter_timer; /* 0x0260 */
114 __u64 mcck_enter_timer; /* 0x0268 */
115 __u64 exit_timer; /* 0x0270 */
116 __u64 user_timer; /* 0x0278 */
117 __u64 system_timer; /* 0x0280 */
118 __u64 steal_timer; /* 0x0288 */
119 __u64 last_update_timer; /* 0x0290 */
120 __u64 last_update_clock; /* 0x0298 */
121 __u64 int_clock; /* 0x02a0 */
122 __u64 mcck_clock; /* 0x02a8 */
123 __u64 clock_comparator; /* 0x02b0 */
124
125 /* Current process. */
126 __u32 current_task; /* 0x02b8 */
127 __u32 thread_info; /* 0x02bc */
128 __u32 kernel_stack; /* 0x02c0 */
129
130 /* Interrupt, panic and restart stack. */
131 __u32 async_stack; /* 0x02c4 */
132 __u32 panic_stack; /* 0x02c8 */
133 __u32 restart_stack; /* 0x02cc */
134
135 /* Restart function and parameter. */
136 __u32 restart_fn; /* 0x02d0 */
137 __u32 restart_data; /* 0x02d4 */
138 __u32 restart_source; /* 0x02d8 */
139
140 /* Address space pointer. */
141 __u32 kernel_asce; /* 0x02dc */
142 __u32 user_asce; /* 0x02e0 */
143 __u32 current_pid; /* 0x02e4 */
144
145 /* SMP info area */
146 __u32 cpu_nr; /* 0x02e8 */
147 __u32 softirq_pending; /* 0x02ec */
148 __u32 percpu_offset; /* 0x02f0 */
149 __u32 machine_flags; /* 0x02f4 */
150 __u8 pad_0x02f8[0x02fc-0x02f8]; /* 0x02f8 */
151 __u32 spinlock_lockval; /* 0x02fc */
152
153 __u8 pad_0x0300[0x0e00-0x0300]; /* 0x0300 */
154
155 /*
156 * 0xe00 contains the address of the IPL Parameter Information
157 * block. Dump tools need IPIB for IPL after dump.
158 * Note: do not change the position of any fields in 0x0e00-0x0f00
159 */
160 __u32 ipib; /* 0x0e00 */
161 __u32 ipib_checksum; /* 0x0e04 */
162 __u32 vmcore_info; /* 0x0e08 */
163 __u8 pad_0x0e0c[0x0e18-0x0e0c]; /* 0x0e0c */
164 __u32 os_info; /* 0x0e18 */
165 __u8 pad_0x0e1c[0x0f00-0x0e1c]; /* 0x0e1c */
166
167 /* Extended facility list */
168 __u64 stfle_fac_list[32]; /* 0x0f00 */
169} __packed;
170
171#else /* CONFIG_32BIT */
172
173#define LC_ORDER 1 16#define LC_ORDER 1
174#define LC_PAGES 2 17#define LC_PAGES 2
175 18
@@ -354,8 +197,6 @@ struct _lowcore {
354 __u8 vector_save_area[1024]; /* 0x1c00 */ 197 __u8 vector_save_area[1024]; /* 0x1c00 */
355} __packed; 198} __packed;
356 199
357#endif /* CONFIG_32BIT */
358
359#define S390_lowcore (*((struct _lowcore *) 0)) 200#define S390_lowcore (*((struct _lowcore *) 0))
360 201
361extern struct _lowcore *lowcore_ptr[]; 202extern struct _lowcore *lowcore_ptr[];
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-20 14:31:15 -0400