Automatic merge with /usr/src/ntfs-2.6.git.

31 files changed, 556 insertions, 104 deletions

diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 848f43970a4b..a7835cd3f51f 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -88,6 +88,9 @@ config 8xx
         depends on BROKEN
         bool "8xx"
 
+config E200
+        bool "e200"
+
 config E500
         bool "e500"
 
@@ -98,12 +101,12 @@ config PPC_FPU
 
 config BOOKE
         bool
-        depends on E500
+        depends on E200 || E500
         default y
 
 config FSL_BOOKE
         bool
-        depends on E500
+        depends on E200 || E500
         default y
 
 config PTE_64BIT
@@ -141,16 +144,16 @@ config ALTIVEC
 
 config SPE
         bool "SPE Support"
-        depends on E500
+        depends on E200 || E500
         ---help---
           This option enables kernel support for the Signal Processing
           Extensions (SPE) to the PowerPC processor. The kernel currently
           supports saving and restoring SPE registers, and turning on the
           'spe enable' bit so user processes can execute SPE instructions.
 
-          This option is only usefully if you have a processor that supports
+          This option is only useful if you have a processor that supports
           SPE (e500, otherwise known as 85xx series), but does not have any
-          affect on a non-spe cpu (it does, however add code to the kernel).
+          effect on a non-spe cpu (it does, however add code to the kernel).
 
           If in doubt, say Y here.
 
@@ -200,7 +203,7 @@ config TAU_AVERAGE
 
 config MATH_EMULATION
         bool "Math emulation"
-        depends on 4xx || 8xx || E500
+        depends on 4xx || 8xx || E200 || E500
         ---help---
           Some PowerPC chips designed for embedded applications do not have
           a floating-point unit and therefore do not implement the
@@ -214,6 +217,26 @@ config MATH_EMULATION
           here.  Saying Y here will not hurt performance (on any machine) but
           will increase the size of the kernel.
 
+config KEXEC
+        bool "kexec system call (EXPERIMENTAL)"
+        depends on EXPERIMENTAL
+        help
+          kexec is a system call that implements the ability to shutdown your
+          current kernel, and to start another kernel.  It is like a reboot
+          but it is indepedent of the system firmware.   And like a reboot
+          you can start any kernel with it, not just Linux.
+
+          The name comes from the similiarity to the exec system call.
+
+          It is an ongoing process to be certain the hardware in a machine
+          is properly shutdown, so do not be surprised if this code does not
+          initially work for you.  It may help to enable device hotplugging
+          support.  As of this writing the exact hardware interface is
+          strongly in flux, so no good recommendation can be made.
+
+          In the GameCube implementation, kexec allows you to load and
+          run DOL files, including kernel and homebrew DOLs.
+
 source "drivers/cpufreq/Kconfig"
 
 config CPU_FREQ_PMAC
@@ -254,7 +277,7 @@ config PPC_STD_MMU
 
 config NOT_COHERENT_CACHE
         bool
-        depends on 4xx || 8xx
+        depends on 4xx || 8xx || E200
         default y
 
 endmenu
diff --git a/arch/ppc/Kconfig.debug b/arch/ppc/Kconfig.debug
index d2e1eea8e8e4..e16c7710d4be 100644
--- a/arch/ppc/Kconfig.debug
+++ b/arch/ppc/Kconfig.debug
@@ -66,7 +66,7 @@ config SERIAL_TEXT_DEBUG
 
 config PPC_OCP
         bool
-        depends on IBM_OCP || FSL_OCP || XILINX_OCP
+        depends on IBM_OCP || XILINX_OCP
         default y
 
 endmenu
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 0432a25b4735..f9b0d778dd82 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -29,7 +29,7 @@ CPP		= $(CC) -E $(CFLAGS)
 
 CHECKFLAGS      += -D__powerpc__
 
-ifndef CONFIG_E500
+ifndef CONFIG_FSL_BOOKE
 CFLAGS          += -mstring
 endif
 
@@ -38,6 +38,7 @@ cpu-as-$(CONFIG_4xx)		+= -Wa,-m405
 cpu-as-$(CONFIG_6xx)            += -Wa,-maltivec
 cpu-as-$(CONFIG_POWER4)         += -Wa,-maltivec
 cpu-as-$(CONFIG_E500)           += -Wa,-me500
+cpu-as-$(CONFIG_E200)           += -Wa,-me200
 
 AFLAGS += $(cpu-as-y)
 CFLAGS += $(cpu-as-y)
diff --git a/arch/ppc/boot/openfirmware/chrpmain.c b/arch/ppc/boot/openfirmware/chrpmain.c
index 6fb4f738728c..effe4a0624b0 100644
--- a/arch/ppc/boot/openfirmware/chrpmain.c
+++ b/arch/ppc/boot/openfirmware/chrpmain.c
@@ -39,7 +39,7 @@ char *avail_high;
 
 #define SCRATCH_SIZE    (128 << 10)
 
-static char scratch[SCRATCH_SIZE];      /* 1MB of scratch space for gunzip */
+static char scratch[SCRATCH_SIZE];      /* 128k of scratch space for gunzip */
 
 typedef void (*kernel_start_t)(int, int, void *, unsigned int, unsigned int);
 
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index b284451802c9..b1457a8a9c0f 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -26,7 +26,10 @@ obj-$(CONFIG_KGDB)		+= ppc-stub.o
 obj-$(CONFIG_SMP)               += smp.o smp-tbsync.o
 obj-$(CONFIG_TAU)               += temp.o
 obj-$(CONFIG_ALTIVEC)           += vecemu.o vector.o
+ifndef CONFIG_E200
 obj-$(CONFIG_FSL_BOOKE)         += perfmon_fsl_booke.o
+endif
+obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 
 ifndef CONFIG_MATH_EMULATION
 obj-$(CONFIG_8xx)               += softemu8xx.o
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index 01c226008dbf..50936cda0af9 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -903,7 +903,30 @@ struct cpu_spec	cpu_specs[] = {
                 .dcache_bsize           = 32,
         },
 #endif /* CONFIG_44x */
-#ifdef CONFIG_E500
+#ifdef CONFIG_FSL_BOOKE
+        {       /* e200z5 */
+                .pvr_mask               = 0xfff00000,
+                .pvr_value              = 0x81000000,
+                .cpu_name               = "e200z5",
+                /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
+                .cpu_features           = CPU_FTR_USE_TB,
+                .cpu_user_features      = PPC_FEATURE_32 |
+                        PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
+                        PPC_FEATURE_UNIFIED_CACHE,
+                .dcache_bsize           = 32,
+        },
+        {       /* e200z6 */
+                .pvr_mask               = 0xfff00000,
+                .pvr_value              = 0x81100000,
+                .cpu_name               = "e200z6",
+                /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
+                .cpu_features           = CPU_FTR_USE_TB,
+                .cpu_user_features      = PPC_FEATURE_32 |
+                        PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
+                        PPC_FEATURE_HAS_EFP_SINGLE |
+                        PPC_FEATURE_UNIFIED_CACHE,
+                .dcache_bsize           = 32,
+        },
         {       /* e500 */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x80200000,
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index 8377b6ca26da..d4df68629cc6 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -60,6 +60,11 @@ mcheck_transfer_to_handler:
         TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK)
         b       transfer_to_handler_full
 
+        .globl  debug_transfer_to_handler
+debug_transfer_to_handler:
+        TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG)
+        b       transfer_to_handler_full
+
         .globl  crit_transfer_to_handler
 crit_transfer_to_handler:
         TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT)
@@ -835,6 +840,10 @@ ret_from_crit_exc:
         RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
 
 #ifdef CONFIG_BOOKE
+        .globl  ret_from_debug_exc
+ret_from_debug_exc:
+        RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI)
+
         .globl  ret_from_mcheck_exc
 ret_from_mcheck_exc:
         RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI)
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
index 9c50f9d2657c..9342acf12e72 100644
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -49,6 +49,7 @@
  *
  * On 40x critical is the only additional level
  * On 44x/e500 we have critical and machine check
+ * On e200 we have critical and debug (machine check occurs via critical)
  *
  * Additionally we reserve a SPRG for each priority level so we can free up a
  * GPR to use as the base for indirect access to the exception stacks.  This
@@ -60,12 +61,16 @@
 
 /* CRIT_SPRG only used in critical exception handling */
 #define CRIT_SPRG       SPRN_SPRG2
-/* MCHECK_SPRG only used in critical exception handling */
+/* MCHECK_SPRG only used in machine check exception handling */
 #define MCHECK_SPRG     SPRN_SPRG6W
 
 #define MCHECK_STACK_TOP        (exception_stack_top - 4096)
 #define CRIT_STACK_TOP          (exception_stack_top)
 
+/* only on e200 for now */
+#define DEBUG_STACK_TOP         (exception_stack_top - 4096)
+#define DEBUG_SPRG              SPRN_SPRG6W
+
 #ifdef CONFIG_SMP
 #define BOOKE_LOAD_EXC_LEVEL_STACK(level)               \
         mfspr   r8,SPRN_PIR;                            \
@@ -124,6 +129,8 @@
 
 #define CRITICAL_EXCEPTION_PROLOG \
                 EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1)
+#define DEBUG_EXCEPTION_PROLOG \
+                EXC_LEVEL_EXCEPTION_PROLOG(DEBUG, SPRN_DSRR0, SPRN_DSRR1)
 #define MCHECK_EXCEPTION_PROLOG \
                 EXC_LEVEL_EXCEPTION_PROLOG(MCHECK, SPRN_MCSRR0, SPRN_MCSRR1)
 
@@ -205,6 +212,60 @@ label:
  * save (and later restore) the MSR via SPRN_CSRR1, which will still have
  * the MSR_DE bit set.
  */
+#ifdef CONFIG_E200
+#define DEBUG_EXCEPTION                                                       \
+        START_EXCEPTION(Debug);                                               \
+        DEBUG_EXCEPTION_PROLOG;                                               \
+                                                                              \
+        /*                                                                    \
+         * If there is a single step or branch-taken exception in an          \
+         * exception entry sequence, it was probably meant to apply to        \
+         * the code where the exception occurred (since exception entry       \
+         * doesn't turn off DE automatically).  We simulate the effect        \
+         * of turning off DE on entry to an exception handler by turning      \
+         * off DE in the CSRR1 value and clearing the debug status.           \
+         */                                                                   \
+        mfspr   r10,SPRN_DBSR;          /* check single-step/branch taken */  \
+        andis.  r10,r10,DBSR_IC@h;                                            \
+        beq+    2f;                                                           \
+                                                                              \
+        lis     r10,KERNELBASE@h;       /* check if exception in vectors */   \
+        ori     r10,r10,KERNELBASE@l;                                         \
+        cmplw   r12,r10;                                                      \
+        blt+    2f;                     /* addr below exception vectors */    \
+                                                                              \
+        lis     r10,Debug@h;                                                  \
+        ori     r10,r10,Debug@l;                                              \
+        cmplw   r12,r10;                                                      \
+        bgt+    2f;                     /* addr above exception vectors */    \
+                                                                              \
+        /* here it looks like we got an inappropriate debug exception. */     \
+1:      rlwinm  r9,r9,0,~MSR_DE;        /* clear DE in the CDRR1 value */     \
+        lis     r10,DBSR_IC@h;          /* clear the IC event */              \
+        mtspr   SPRN_DBSR,r10;                                                \
+        /* restore state and get out */                                       \
+        lwz     r10,_CCR(r11);                                                \
+        lwz     r0,GPR0(r11);                                                 \
+        lwz     r1,GPR1(r11);                                                 \
+        mtcrf   0x80,r10;                                                     \
+        mtspr   SPRN_DSRR0,r12;                                               \
+        mtspr   SPRN_DSRR1,r9;                                                \
+        lwz     r9,GPR9(r11);                                                 \
+        lwz     r12,GPR12(r11);                                               \
+        mtspr   DEBUG_SPRG,r8;                                                \
+        BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \
+        lwz     r10,GPR10-INT_FRAME_SIZE(r8);                                 \
+        lwz     r11,GPR11-INT_FRAME_SIZE(r8);                                 \
+        mfspr   r8,DEBUG_SPRG;                                                \
+                                                                              \
+        RFDI;                                                                 \
+        b       .;                                                            \
+                                                                              \
+        /* continue normal handling for a critical exception... */            \
+2:      mfspr   r4,SPRN_DBSR;                                                 \
+        addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
+        EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
+#else
 #define DEBUG_EXCEPTION                                                       \
         START_EXCEPTION(Debug);                                               \
         CRITICAL_EXCEPTION_PROLOG;                                            \
@@ -257,6 +318,7 @@ label:
 2:      mfspr   r4,SPRN_DBSR;                                                 \
         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
         EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
+#endif
 
 #define INSTRUCTION_STORAGE_EXCEPTION                                         \
         START_EXCEPTION(InstructionStorage)                                   \
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index ce36e88ba627..eb804b7a3cb2 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -102,6 +102,7 @@ invstr:	mflr	r6				/* Make it accessible */
         or      r7,r7,r4
         mtspr   SPRN_MAS6,r7
         tlbsx   0,r6                            /* search MSR[IS], SPID=PID0 */
+#ifndef CONFIG_E200
         mfspr   r7,SPRN_MAS1
         andis.  r7,r7,MAS1_VALID@h
         bne     match_TLB
@@ -118,6 +119,7 @@ invstr:	mflr	r6				/* Make it accessible */
         or      r7,r7,r4
         mtspr   SPRN_MAS6,r7
         tlbsx   0,r6                            /* Fall through, we had to match */
+#endif
 match_TLB:
         mfspr   r7,SPRN_MAS0
         rlwinm  r3,r7,16,20,31                  /* Extract MAS0(Entry) */
@@ -196,8 +198,10 @@ skpinv:	addi	r6,r6,1				/* Increment */
 /* 4. Clear out PIDs & Search info */
         li      r6,0
         mtspr   SPRN_PID0,r6
+#ifndef CONFIG_E200
         mtspr   SPRN_PID1,r6
         mtspr   SPRN_PID2,r6
+#endif
         mtspr   SPRN_MAS6,r6
 
 /* 5. Invalidate mapping we started in */
@@ -277,7 +281,9 @@ skpinv:	addi	r6,r6,1				/* Increment */
         SET_IVOR(32, SPEUnavailable);
         SET_IVOR(33, SPEFloatingPointData);
         SET_IVOR(34, SPEFloatingPointRound);
+#ifndef CONFIG_E200
         SET_IVOR(35, PerformanceMonitor);
+#endif
 
         /* Establish the interrupt vector base */
         lis     r4,interrupt_base@h     /* IVPR only uses the high 16-bits */
@@ -285,6 +291,9 @@ skpinv:	addi	r6,r6,1				/* Increment */
 
         /* Setup the defaults for TLB entries */
         li      r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
+#ifdef CONFIG_E200
+        oris    r2,r2,MAS4_TLBSELD(1)@h
+#endif
         mtspr   SPRN_MAS4, r2
 
 #if 0
@@ -293,6 +302,12 @@ skpinv:	addi	r6,r6,1				/* Increment */
         oris    r2,r2,HID0_DOZE@h
         mtspr   SPRN_HID0, r2
 #endif
+#ifdef CONFIG_E200
+        /* enable dedicated debug exception handling resources (Debug APU) */
+        mfspr   r2,SPRN_HID0
+        ori     r2,r2,HID0_DAPUEN@l
+        mtspr   SPRN_HID0,r2
+#endif
 
 #if !defined(CONFIG_BDI_SWITCH)
         /*
@@ -414,7 +429,12 @@ interrupt_base:
         CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
 
         /* Machine Check Interrupt */
+#ifdef CONFIG_E200
+        /* no RFMCI, MCSRRs on E200 */
+        CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+#else
         MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+#endif
 
         /* Data Storage Interrupt */
         START_EXCEPTION(DataStorage)
@@ -520,8 +540,13 @@ interrupt_base:
 #ifdef CONFIG_PPC_FPU
         FP_UNAVAILABLE_EXCEPTION
 #else
+#ifdef CONFIG_E200
+        /* E200 treats 'normal' floating point instructions as FP Unavail exception */
+        EXCEPTION(0x0800, FloatingPointUnavailable, ProgramCheckException, EXC_XFER_EE)
+#else
         EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
 #endif
+#endif
 
         /* System Call Interrupt */
         START_EXCEPTION(SystemCall)
@@ -691,6 +716,7 @@ interrupt_base:
 /*
  * Local functions
  */
+
         /*
          * Data TLB exceptions will bail out to this point
          * if they can't resolve the lightweight TLB fault.
@@ -761,6 +787,31 @@ END_FTR_SECTION_IFSET(CPU_FTR_BIG_PHYS)
 2:      rlwimi  r11, r12, 0, 20, 31     /* Extract RPN from PTE and merge with perms */
         mtspr   SPRN_MAS3, r11
 #endif
+#ifdef CONFIG_E200
+        /* Round robin TLB1 entries assignment */
+        mfspr   r12, SPRN_MAS0
+
+        /* Extract TLB1CFG(NENTRY) */
+        mfspr   r11, SPRN_TLB1CFG
+        andi.   r11, r11, 0xfff
+
+        /* Extract MAS0(NV) */
+        andi.   r13, r12, 0xfff
+        addi    r13, r13, 1
+        cmpw    0, r13, r11
+        addi    r12, r12, 1
+
+        /* check if we need to wrap */
+        blt     7f
+
+        /* wrap back to first free tlbcam entry */
+        lis     r13, tlbcam_index@ha
+        lwz     r13, tlbcam_index@l(r13)
+        rlwimi  r12, r13, 0, 20, 31
+7:
+        mtspr   SPRN_MAS0,r12
+#endif /* CONFIG_E200 */
+
         tlbwe
 
         /* Done...restore registers and get out of here.  */
diff --git a/arch/ppc/kernel/machine_kexec.c b/arch/ppc/kernel/machine_kexec.c
new file mode 100644
index 000000000000..84d65a87191e
--- /dev/null
+++ b/arch/ppc/kernel/machine_kexec.c
@@ -0,0 +1,118 @@
+/*
+ * machine_kexec.c - handle transition of Linux booting another kernel
+ * Copyright (C) 2002-2003 Eric Biederman  <ebiederm@xmission.com>
+ *
+ * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2.  See the file COPYING for more details.
+ */
+
+#include <linux/mm.h>
+#include <linux/kexec.h>
+#include <linux/delay.h>
+#include <linux/reboot.h>
+#include <asm/pgtable.h>
+#include <asm/pgalloc.h>
+#include <asm/mmu_context.h>
+#include <asm/io.h>
+#include <asm/hw_irq.h>
+#include <asm/cacheflush.h>
+#include <asm/machdep.h>
+
+typedef NORET_TYPE void (*relocate_new_kernel_t)(
+                                unsigned long indirection_page,
+                                unsigned long reboot_code_buffer,
+                                unsigned long start_address) ATTRIB_NORET;
+
+const extern unsigned char relocate_new_kernel[];
+const extern unsigned int relocate_new_kernel_size;
+
+void machine_shutdown(void)
+{
+        if (ppc_md.machine_shutdown)
+                ppc_md.machine_shutdown();
+}
+
+void machine_crash_shutdown(struct pt_regs *regs)
+{
+        if (ppc_md.machine_crash_shutdown)
+                ppc_md.machine_crash_shutdown();
+}
+
+/*
+ * Do what every setup is needed on image and the
+ * reboot code buffer to allow us to avoid allocations
+ * later.
+ */
+int machine_kexec_prepare(struct kimage *image)
+{
+        if (ppc_md.machine_kexec_prepare)
+                return ppc_md.machine_kexec_prepare(image);
+        /*
+         * Fail if platform doesn't provide its own machine_kexec_prepare
+         * implementation.
+         */
+        return -ENOSYS;
+}
+
+void machine_kexec_cleanup(struct kimage *image)
+{
+        if (ppc_md.machine_kexec_cleanup)
+                ppc_md.machine_kexec_cleanup(image);
+}
+
+/*
+ * Do not allocate memory (or fail in any way) in machine_kexec().
+ * We are past the point of no return, committed to rebooting now.
+ */
+NORET_TYPE void machine_kexec(struct kimage *image)
+{
+        if (ppc_md.machine_kexec)
+                ppc_md.machine_kexec(image);
+        else {
+                /*
+                 * Fall back to normal restart if platform doesn't provide
+                 * its own kexec function, and user insist to kexec...
+                 */
+                machine_restart(NULL);
+        }
+        for(;;);
+}
+
+/*
+ * This is a generic machine_kexec function suitable at least for
+ * non-OpenFirmware embedded platforms.
+ * It merely copies the image relocation code to the control page and
+ * jumps to it.
+ * A platform specific function may just call this one.
+ */
+void machine_kexec_simple(struct kimage *image)
+{
+        unsigned long page_list;
+        unsigned long reboot_code_buffer, reboot_code_buffer_phys;
+        relocate_new_kernel_t rnk;
+
+        /* Interrupts aren't acceptable while we reboot */
+        local_irq_disable();
+
+        page_list = image->head;
+
+        /* we need both effective and real address here */
+        reboot_code_buffer =
+                        (unsigned long)page_address(image->control_code_page);
+        reboot_code_buffer_phys = virt_to_phys((void *)reboot_code_buffer);
+
+        /* copy our kernel relocation code to the control code page */
+        memcpy((void *)reboot_code_buffer, relocate_new_kernel,
+                                                relocate_new_kernel_size);
+
+        flush_icache_range(reboot_code_buffer,
+                                reboot_code_buffer + KEXEC_CONTROL_CODE_SIZE);
+        printk(KERN_INFO "Bye!\n");
+
+        /* now call it */
+        rnk = (relocate_new_kernel_t) reboot_code_buffer;
+        (*rnk)(page_list, reboot_code_buffer_phys, image->start);
+}
+
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 7329ef177a18..b6a63a49a232 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -593,6 +593,14 @@ _GLOBAL(flush_instruction_cache)
         iccci   0,r3
 #endif
 #elif CONFIG_FSL_BOOKE
+BEGIN_FTR_SECTION
+        mfspr   r3,SPRN_L1CSR0
+        ori     r3,r3,L1CSR0_CFI|L1CSR0_CLFC
+        /* msync; isync recommended here */
+        mtspr   SPRN_L1CSR0,r3
+        isync
+        blr
+END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
         mfspr   r3,SPRN_L1CSR1
         ori     r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
         mtspr   SPRN_L1CSR1,r3
@@ -1436,7 +1444,7 @@ _GLOBAL(sys_call_table)
         .long sys_mq_timedreceive       /* 265 */
         .long sys_mq_notify
         .long sys_mq_getsetattr
-        .long sys_ni_syscall            /* 268 reserved for sys_kexec_load */
+        .long sys_kexec_load
         .long sys_add_key
         .long sys_request_key           /* 270 */
         .long sys_keyctl
diff --git a/arch/ppc/kernel/perfmon.c b/arch/ppc/kernel/perfmon.c
index 918f6b252e45..fa1dad96b830 100644
--- a/arch/ppc/kernel/perfmon.c
+++ b/arch/ppc/kernel/perfmon.c
@@ -36,7 +36,7 @@
 /* A lock to regulate grabbing the interrupt */
 DEFINE_SPINLOCK(perfmon_lock);
 
-#ifdef CONFIG_FSL_BOOKE
+#if defined (CONFIG_FSL_BOOKE) && !defined (CONFIG_E200)
 static void dummy_perf(struct pt_regs *regs)
 {
         unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
diff --git a/arch/ppc/kernel/relocate_kernel.S b/arch/ppc/kernel/relocate_kernel.S
new file mode 100644
index 000000000000..7ff69c4af920
--- /dev/null
+++ b/arch/ppc/kernel/relocate_kernel.S
@@ -0,0 +1,123 @@
+/*
+ * relocate_kernel.S - put the kernel image in place to boot
+ * Copyright (C) 2002-2003 Eric Biederman  <ebiederm@xmission.com>
+ *
+ * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2.  See the file COPYING for more details.
+ */
+
+#include <asm/reg.h>
+#include <asm/ppc_asm.h>
+#include <asm/processor.h>
+
+#include <asm/kexec.h>
+
+#define PAGE_SIZE      4096 /* must be same value as in <asm/page.h> */
+
+        /*
+         * Must be relocatable PIC code callable as a C function.
+         */
+        .globl relocate_new_kernel
+relocate_new_kernel:
+        /* r3 = page_list   */
+        /* r4 = reboot_code_buffer */
+        /* r5 = start_address      */
+
+        li      r0, 0
+
+        /*
+         * Set Machine Status Register to a known status,
+         * switch the MMU off and jump to 1: in a single step.
+         */
+
+        mr      r8, r0
+        ori     r8, r8, MSR_RI|MSR_ME
+        mtspr   SRR1, r8
+        addi    r8, r4, 1f - relocate_new_kernel
+        mtspr   SRR0, r8
+        sync
+        rfi
+
+1:
+        /* from this point address translation is turned off */
+        /* and interrupts are disabled */
+
+        /* set a new stack at the bottom of our page... */
+        /* (not really needed now) */
+        addi    r1, r4, KEXEC_CONTROL_CODE_SIZE - 8 /* for LR Save+Back Chain */
+        stw     r0, 0(r1)
+
+        /* Do the copies */
+        li      r6, 0 /* checksum */
+        mr      r0, r3
+        b       1f
+
+0:      /* top, read another word for the indirection page */
+        lwzu    r0, 4(r3)
+
+1:
+        /* is it a destination page? (r8) */
+        rlwinm. r7, r0, 0, 31, 31 /* IND_DESTINATION (1<<0) */
+        beq     2f
+
+        rlwinm  r8, r0, 0, 0, 19 /* clear kexec flags, page align */
+        b       0b
+
+2:      /* is it an indirection page? (r3) */
+        rlwinm. r7, r0, 0, 30, 30 /* IND_INDIRECTION (1<<1) */
+        beq     2f
+
+        rlwinm  r3, r0, 0, 0, 19 /* clear kexec flags, page align */
+        subi    r3, r3, 4
+        b       0b
+
+2:      /* are we done? */
+        rlwinm. r7, r0, 0, 29, 29 /* IND_DONE (1<<2) */
+        beq     2f
+        b       3f
+
+2:      /* is it a source page? (r9) */
+        rlwinm. r7, r0, 0, 28, 28 /* IND_SOURCE (1<<3) */
+        beq     0b
+
+        rlwinm  r9, r0, 0, 0, 19 /* clear kexec flags, page align */
+
+        li      r7, PAGE_SIZE / 4
+        mtctr   r7
+        subi    r9, r9, 4
+        subi    r8, r8, 4
+9:
+        lwzu    r0, 4(r9)  /* do the copy */
+        xor     r6, r6, r0
+        stwu    r0, 4(r8)
+        dcbst   0, r8
+        sync
+        icbi    0, r8
+        bdnz    9b
+
+        addi    r9, r9, 4
+        addi    r8, r8, 4
+        b       0b
+
+3:
+
+        /* To be certain of avoiding problems with self-modifying code
+         * execute a serializing instruction here.
+         */
+        isync
+        sync
+
+        /* jump to the entry point, usually the setup routine */
+        mtlr    r5
+        blrl
+
+1:      b       1b
+
+relocate_new_kernel_end:
+
+        .globl relocate_new_kernel_size
+relocate_new_kernel_size:
+        .long relocate_new_kernel_end - relocate_new_kernel
+
diff --git a/arch/ppc/kernel/signal.c b/arch/ppc/kernel/signal.c
index 7c8437da09d5..8aaeb6f4e750 100644
--- a/arch/ppc/kernel/signal.c
+++ b/arch/ppc/kernel/signal.c
@@ -705,8 +705,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
         unsigned long frame, newsp;
         int signr, ret;
 
-        if (current->flags & PF_FREEZE) {
-                refrigerator(PF_FREEZE);
+        if (try_to_freeze()) {
                 signr = 0;
                 if (!signal_pending(current))
                         goto no_signal;
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 2ca8ecfeefd9..9e6ae5696650 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -173,13 +173,13 @@ static inline int check_io_access(struct pt_regs *regs)
 /* On 4xx, the reason for the machine check or program exception
    is in the ESR. */
 #define get_reason(regs)        ((regs)->dsisr)
-#ifndef CONFIG_E500
+#ifndef CONFIG_FSL_BOOKE
 #define get_mc_reason(regs)     ((regs)->dsisr)
 #else
 #define get_mc_reason(regs)     (mfspr(SPRN_MCSR))
 #endif
 #define REASON_FP               ESR_FP
-#define REASON_ILLEGAL          ESR_PIL
+#define REASON_ILLEGAL          (ESR_PIL | ESR_PUO)
 #define REASON_PRIVILEGED       ESR_PPR
 #define REASON_TRAP             ESR_PTR
 
@@ -302,7 +302,25 @@ void MachineCheckException(struct pt_regs *regs)
                 printk("Bus - Instruction Parity Error\n");
         if (reason & MCSR_BUS_RPERR)
                 printk("Bus - Read Parity Error\n");
-#else /* !CONFIG_4xx && !CONFIG_E500 */
+#elif defined (CONFIG_E200)
+        printk("Machine check in kernel mode.\n");
+        printk("Caused by (from MCSR=%lx): ", reason);
+
+        if (reason & MCSR_MCP)
+                printk("Machine Check Signal\n");
+        if (reason & MCSR_CP_PERR)
+                printk("Cache Push Parity Error\n");
+        if (reason & MCSR_CPERR)
+                printk("Cache Parity Error\n");
+        if (reason & MCSR_EXCP_ERR)
+                printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
+        if (reason & MCSR_BUS_IRERR)
+                printk("Bus - Read Bus Error on instruction fetch\n");
+        if (reason & MCSR_BUS_DRERR)
+                printk("Bus - Read Bus Error on data load\n");
+        if (reason & MCSR_BUS_WRERR)
+                printk("Bus - Write Bus Error on buffered store or cache line push\n");
+#else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
         printk("Machine check in kernel mode.\n");
         printk("Caused by (from SRR1=%lx): ", reason);
         switch (reason & 0x601F0000) {
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
index 72f7c0d1c0ed..3d79ce281b67 100644
--- a/arch/ppc/mm/44x_mmu.c
+++ b/arch/ppc/mm/44x_mmu.c
@@ -39,7 +39,6 @@
 #include <linux/vmalloc.h>
 #include <linux/init.h>
 #include <linux/delay.h>
-#include <linux/bootmem.h>
 #include <linux/highmem.h>
 
 #include <asm/pgalloc.h>
diff --git a/arch/ppc/mm/4xx_mmu.c b/arch/ppc/mm/4xx_mmu.c
index a7f616140381..b7bcbc232f39 100644
--- a/arch/ppc/mm/4xx_mmu.c
+++ b/arch/ppc/mm/4xx_mmu.c
@@ -36,7 +36,6 @@
 #include <linux/vmalloc.h>
 #include <linux/init.h>
 #include <linux/delay.h>
-#include <linux/bootmem.h>
 #include <linux/highmem.h>
 
 #include <asm/pgalloc.h>
diff --git a/arch/ppc/mm/fsl_booke_mmu.c b/arch/ppc/mm/fsl_booke_mmu.c
index e07990efa046..af9ca0eb6d55 100644
--- a/arch/ppc/mm/fsl_booke_mmu.c
+++ b/arch/ppc/mm/fsl_booke_mmu.c
@@ -41,7 +41,6 @@
 #include <linux/vmalloc.h>
 #include <linux/init.h>
 #include <linux/delay.h>
-#include <linux/bootmem.h>
 #include <linux/highmem.h>
 
 #include <asm/pgalloc.h>
@@ -126,7 +125,7 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys,
                 flags |= _PAGE_COHERENT;
 #endif
 
-        TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
+        TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
         TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
         TLBCAM[index].MAS2 = virt & PAGE_MASK;
 
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index 37ece1542799..ddd04d4c1ea9 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -94,20 +94,24 @@ mpc834x_sys_setup_arch(void)
 
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC83xx_IRQ_EXT1;
-        pdata->phyid = 0;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC83xx_IRQ_EXT1;
+                pdata->phyid = 0;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC83xx_IRQ_EXT2;
-        pdata->phyid = 1;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC83xx_IRQ_EXT2;
+                pdata->phyid = 1;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        }
 
 #ifdef CONFIG_BLK_DEV_INITRD
         if (initrd_start)
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
index a2ed611cd936..ddd2e9a5bb12 100644
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c
@@ -92,28 +92,34 @@ mpc8540ads_setup_arch(void)
 
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-        pdata->phyid = 0;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+                pdata->phyid = 0;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-        pdata->phyid = 1;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
-
-        pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
-        pdata->board_flags = 0;
-        pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-        pdata->phyid = 3;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+                pdata->phyid = 1;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        }
+
+        if (pdata) {
+                pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
+                pdata->board_flags = 0;
+                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+                pdata->phyid = 3;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
+        }
 
 #ifdef CONFIG_BLK_DEV_INITRD
         if (initrd_start)
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c
index d87dfd5ce0a2..e18380258b68 100644
--- a/arch/ppc/platforms/85xx/mpc8560_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8560_ads.c
@@ -90,20 +90,24 @@ mpc8560ads_setup_arch(void)
 
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-        pdata->phyid = 0;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+                pdata->phyid = 0;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-        pdata->phyid = 1;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+                pdata->phyid = 1;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        }
 
 #ifdef CONFIG_BLK_DEV_INITRD
         if (initrd_start)
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
index 3dbdd73618eb..165df94d4aa6 100644
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ b/arch/ppc/platforms/85xx/sbc8560.c
@@ -129,20 +129,24 @@ sbc8560_setup_arch(void)
 
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC85xx_IRQ_EXT6;
-        pdata->phyid = 25;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC85xx_IRQ_EXT6;
+                pdata->phyid = 25;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-        pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
-        pdata->interruptPHY = MPC85xx_IRQ_EXT7;
-        pdata->phyid = 26;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        if (pdata) {
+                pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
+                pdata->interruptPHY = MPC85xx_IRQ_EXT7;
+                pdata->phyid = 26;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        }
 
 #ifdef CONFIG_BLK_DEV_INITRD
         if (initrd_start)
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
index 9455bb6b45e9..bb41265cfc85 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ b/arch/ppc/platforms/85xx/stx_gp3.c
@@ -122,19 +122,23 @@ gp3_setup_arch(void)
 
         /* setup the board related information for the enet controllers */
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
-/*      pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
-        pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-        pdata->phyid = 2;
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        if (pdata) {
+        /*      pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
+                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+                pdata->phyid = 2;
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
+        }
 
         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
-/*      pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
-        pdata->interruptPHY = MPC85xx_IRQ_EXT5;
-        pdata->phyid = 4;
-        /* fixup phy address */
-        pdata->phy_reg_addr += binfo->bi_immr_base;
-        memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        if (pdata) {
+        /*      pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
+                pdata->interruptPHY = MPC85xx_IRQ_EXT5;
+                pdata->phyid = 4;
+                /* fixup phy address */
+                pdata->phy_reg_addr += binfo->bi_immr_base;
+                memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
+        }
 
 #ifdef CONFIG_BLK_DEV_INITRD
         if (initrd_start)
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index 7d0ee308f662..7d3fbb5c5db2 100644
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -9,7 +9,6 @@
 #include <linux/string.h>
 #include <linux/init.h>
 #include <linux/ide.h>
-#include <linux/bootmem.h>
 
 #include <asm/io.h>
 #include <asm/pgtable.h>
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index eda922ac3167..169dbf6534b9 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -27,12 +27,12 @@
 #include <linux/root_dev.h>
 #include <linux/delay.h>
 #include <linux/seq_file.h>
-#include <linux/bootmem.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mv643xx.h>
 #ifdef CONFIG_BOOTIMG
 #include <linux/bootimg.h>
 #endif
+#include <asm/io.h>
 #include <asm/page.h>
 #include <asm/time.h>
 #include <asm/smp.h>
diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c
index f6ff51924061..719fb49fe2bc 100644
--- a/arch/ppc/platforms/pmac_pci.c
+++ b/arch/ppc/platforms/pmac_pci.c
@@ -17,7 +17,6 @@
 #include <linux/delay.h>
 #include <linux/string.h>
 #include <linux/init.h>
-#include <linux/bootmem.h>
 
 #include <asm/sections.h>
 #include <asm/io.h>
diff --git a/arch/ppc/syslib/cpm2_common.c b/arch/ppc/syslib/cpm2_common.c
index ea5e77080e8d..4c19a4ac7163 100644
--- a/arch/ppc/syslib/cpm2_common.c
+++ b/arch/ppc/syslib/cpm2_common.c
@@ -21,8 +21,8 @@
 #include <linux/string.h>
 #include <linux/mm.h>
 #include <linux/interrupt.h>
-#include <linux/bootmem.h>
 #include <linux/module.h>
+#include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/mpc8260.h>
 #include <asm/page.h>
diff --git a/arch/ppc/syslib/indirect_pci.c b/arch/ppc/syslib/indirect_pci.c
index a5a752609e2c..e71488469704 100644
--- a/arch/ppc/syslib/indirect_pci.c
+++ b/arch/ppc/syslib/indirect_pci.c
@@ -14,7 +14,6 @@
 #include <linux/delay.h>
 #include <linux/string.h>
 #include <linux/init.h>
-#include <linux/bootmem.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
diff --git a/arch/ppc/syslib/ipic.c b/arch/ppc/syslib/ipic.c
index 580ed658e872..8f01e0f1d847 100644
--- a/arch/ppc/syslib/ipic.c
+++ b/arch/ppc/syslib/ipic.c
@@ -79,7 +79,7 @@ static struct ipic_info ipic_info[] = {
                 .prio_mask = 7,
         },
         [17] = {
-                .pend   = IPIC_SIPNR_H,
+                .pend   = IPIC_SEPNR,
                 .mask   = IPIC_SEMSR,
                 .prio   = IPIC_SMPRR_A,
                 .force  = IPIC_SEFCR,
@@ -87,7 +87,7 @@ static struct ipic_info ipic_info[] = {
                 .prio_mask = 5,
         },
         [18] = {
-                .pend   = IPIC_SIPNR_H,
+                .pend   = IPIC_SEPNR,
                 .mask   = IPIC_SEMSR,
                 .prio   = IPIC_SMPRR_A,
                 .force  = IPIC_SEFCR,
@@ -95,7 +95,7 @@ static struct ipic_info ipic_info[] = {
                 .prio_mask = 6,
         },
         [19] = {
-                .pend   = IPIC_SIPNR_H,
+                .pend   = IPIC_SEPNR,
                 .mask   = IPIC_SEMSR,
                 .prio   = IPIC_SMPRR_A,
                 .force  = IPIC_SEFCR,
@@ -103,7 +103,7 @@ static struct ipic_info ipic_info[] = {
                 .prio_mask = 7,
         },
         [20] = {
-                .pend   = IPIC_SIPNR_H,
+                .pend   = IPIC_SEPNR,
                 .mask   = IPIC_SEMSR,
                 .prio   = IPIC_SMPRR_B,
                 .force  = IPIC_SEFCR,
@@ -111,7 +111,7 @@ static struct ipic_info ipic_info[] = {
                 .prio_mask = 4,
         },
         [21] = {
-                .pend   = IPIC_SIPNR_H,
+                .pend   = IPIC_SEPNR,
                 .mask   = IPIC_SEMSR,
                 .prio   = IPIC_SMPRR_B,
                 .force  = IPIC_SEFCR,
@@ -119,7 +119,7 @@ static struct ipic_info ipic_info[] = {
                 .prio_mask = 5,
         },
         [22] = {
-                .pend   = IPIC_SIPNR_H,
+                .pend   = IPIC_SEPNR,
                 .mask   = IPIC_SEMSR,
                 .prio   = IPIC_SMPRR_B,
                 .force  = IPIC_SEFCR,
@@ -127,7 +127,7 @@ static struct ipic_info ipic_info[] = {
                 .prio_mask = 6,
         },
         [23] = {
-                .pend   = IPIC_SIPNR_H,
+                .pend   = IPIC_SEPNR,
                 .mask   = IPIC_SEMSR,
                 .prio   = IPIC_SMPRR_B,
                 .force  = IPIC_SEFCR,
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 7b241e7876bd..cc77177fa1c6 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -17,7 +17,6 @@
 #include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/string.h>
-#include <linux/bootmem.h>
 #include <linux/spinlock.h>
 #include <linux/mv643xx.h>
 
diff --git a/arch/ppc/syslib/mv64x60_win.c b/arch/ppc/syslib/mv64x60_win.c
index b6f0f5dcf6ee..5b827e2bbe22 100644
--- a/arch/ppc/syslib/mv64x60_win.c
+++ b/arch/ppc/syslib/mv64x60_win.c
@@ -17,7 +17,6 @@
 #include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/string.h>
-#include <linux/bootmem.h>
 #include <linux/mv643xx.h>
 
 #include <asm/byteorder.h>