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authorAnton Blanchard <anton@samba.org>2005-09-06 00:53:57 -0400
committerPaul Mackerras <paulus@samba.org>2005-09-06 02:09:21 -0400
commit1a410d883023da70806a0190c4bde104545cb9c6 (patch)
treefbc47ca22df94ed69e78d9abe9153cbe22a74924 /arch/ppc64/kernel/cputable.c
parenta6908cd00036080fbea14ff67335e5f2a1ab5489 (diff)
[PATCH] ppc64: Add oprofile cpu_type to cpu feature struct
Add oprofile cpu_type to cpu feature struct. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc64/kernel/cputable.c')
-rw-r--r--arch/ppc64/kernel/cputable.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/ppc64/kernel/cputable.c b/arch/ppc64/kernel/cputable.c
index 25ab72323c58..c022ec4d1e91 100644
--- a/arch/ppc64/kernel/cputable.c
+++ b/arch/ppc64/kernel/cputable.c
@@ -60,6 +60,7 @@ struct cpu_spec cpu_specs[] = {
60 .dcache_bsize = 128, 60 .dcache_bsize = 128,
61 .num_pmcs = 8, 61 .num_pmcs = 8,
62 .cpu_setup = __setup_cpu_power3, 62 .cpu_setup = __setup_cpu_power3,
63 .oprofile_cpu_type = "ppc64/power3",
63 }, 64 },
64 { /* Power3+ */ 65 { /* Power3+ */
65 .pvr_mask = 0xffff0000, 66 .pvr_mask = 0xffff0000,
@@ -72,6 +73,7 @@ struct cpu_spec cpu_specs[] = {
72 .dcache_bsize = 128, 73 .dcache_bsize = 128,
73 .num_pmcs = 8, 74 .num_pmcs = 8,
74 .cpu_setup = __setup_cpu_power3, 75 .cpu_setup = __setup_cpu_power3,
76 .oprofile_cpu_type = "ppc64/power3",
75 }, 77 },
76 { /* Northstar */ 78 { /* Northstar */
77 .pvr_mask = 0xffff0000, 79 .pvr_mask = 0xffff0000,
@@ -85,6 +87,7 @@ struct cpu_spec cpu_specs[] = {
85 .dcache_bsize = 128, 87 .dcache_bsize = 128,
86 .num_pmcs = 8, 88 .num_pmcs = 8,
87 .cpu_setup = __setup_cpu_power3, 89 .cpu_setup = __setup_cpu_power3,
90 .oprofile_cpu_type = "ppc64/rs64",
88 }, 91 },
89 { /* Pulsar */ 92 { /* Pulsar */
90 .pvr_mask = 0xffff0000, 93 .pvr_mask = 0xffff0000,
@@ -98,6 +101,7 @@ struct cpu_spec cpu_specs[] = {
98 .dcache_bsize = 128, 101 .dcache_bsize = 128,
99 .num_pmcs = 8, 102 .num_pmcs = 8,
100 .cpu_setup = __setup_cpu_power3, 103 .cpu_setup = __setup_cpu_power3,
104 .oprofile_cpu_type = "ppc64/rs64",
101 }, 105 },
102 { /* I-star */ 106 { /* I-star */
103 .pvr_mask = 0xffff0000, 107 .pvr_mask = 0xffff0000,
@@ -111,6 +115,7 @@ struct cpu_spec cpu_specs[] = {
111 .dcache_bsize = 128, 115 .dcache_bsize = 128,
112 .num_pmcs = 8, 116 .num_pmcs = 8,
113 .cpu_setup = __setup_cpu_power3, 117 .cpu_setup = __setup_cpu_power3,
118 .oprofile_cpu_type = "ppc64/rs64",
114 }, 119 },
115 { /* S-star */ 120 { /* S-star */
116 .pvr_mask = 0xffff0000, 121 .pvr_mask = 0xffff0000,
@@ -124,6 +129,7 @@ struct cpu_spec cpu_specs[] = {
124 .dcache_bsize = 128, 129 .dcache_bsize = 128,
125 .num_pmcs = 8, 130 .num_pmcs = 8,
126 .cpu_setup = __setup_cpu_power3, 131 .cpu_setup = __setup_cpu_power3,
132 .oprofile_cpu_type = "ppc64/rs64",
127 }, 133 },
128 { /* Power4 */ 134 { /* Power4 */
129 .pvr_mask = 0xffff0000, 135 .pvr_mask = 0xffff0000,
@@ -137,6 +143,7 @@ struct cpu_spec cpu_specs[] = {
137 .dcache_bsize = 128, 143 .dcache_bsize = 128,
138 .num_pmcs = 8, 144 .num_pmcs = 8,
139 .cpu_setup = __setup_cpu_power4, 145 .cpu_setup = __setup_cpu_power4,
146 .oprofile_cpu_type = "ppc64/power4",
140 }, 147 },
141 { /* Power4+ */ 148 { /* Power4+ */
142 .pvr_mask = 0xffff0000, 149 .pvr_mask = 0xffff0000,
@@ -150,6 +157,7 @@ struct cpu_spec cpu_specs[] = {
150 .dcache_bsize = 128, 157 .dcache_bsize = 128,
151 .num_pmcs = 8, 158 .num_pmcs = 8,
152 .cpu_setup = __setup_cpu_power4, 159 .cpu_setup = __setup_cpu_power4,
160 .oprofile_cpu_type = "ppc64/power4",
153 }, 161 },
154 { /* PPC970 */ 162 { /* PPC970 */
155 .pvr_mask = 0xffff0000, 163 .pvr_mask = 0xffff0000,
@@ -165,6 +173,7 @@ struct cpu_spec cpu_specs[] = {
165 .dcache_bsize = 128, 173 .dcache_bsize = 128,
166 .num_pmcs = 8, 174 .num_pmcs = 8,
167 .cpu_setup = __setup_cpu_ppc970, 175 .cpu_setup = __setup_cpu_ppc970,
176 .oprofile_cpu_type = "ppc64/970",
168 }, 177 },
169 { /* PPC970FX */ 178 { /* PPC970FX */
170 .pvr_mask = 0xffff0000, 179 .pvr_mask = 0xffff0000,
@@ -180,6 +189,7 @@ struct cpu_spec cpu_specs[] = {
180 .dcache_bsize = 128, 189 .dcache_bsize = 128,
181 .num_pmcs = 8, 190 .num_pmcs = 8,
182 .cpu_setup = __setup_cpu_ppc970, 191 .cpu_setup = __setup_cpu_ppc970,
192 .oprofile_cpu_type = "ppc64/970",
183 }, 193 },
184 { /* PPC970MP */ 194 { /* PPC970MP */
185 .pvr_mask = 0xffff0000, 195 .pvr_mask = 0xffff0000,
@@ -194,6 +204,7 @@ struct cpu_spec cpu_specs[] = {
194 .icache_bsize = 128, 204 .icache_bsize = 128,
195 .dcache_bsize = 128, 205 .dcache_bsize = 128,
196 .cpu_setup = __setup_cpu_ppc970, 206 .cpu_setup = __setup_cpu_ppc970,
207 .oprofile_cpu_type = "ppc64/970",
197 }, 208 },
198 { /* Power5 */ 209 { /* Power5 */
199 .pvr_mask = 0xffff0000, 210 .pvr_mask = 0xffff0000,
@@ -209,6 +220,7 @@ struct cpu_spec cpu_specs[] = {
209 .dcache_bsize = 128, 220 .dcache_bsize = 128,
210 .num_pmcs = 6, 221 .num_pmcs = 6,
211 .cpu_setup = __setup_cpu_power4, 222 .cpu_setup = __setup_cpu_power4,
223 .oprofile_cpu_type = "ppc64/power5",
212 }, 224 },
213 { /* Power5 */ 225 { /* Power5 */
214 .pvr_mask = 0xffff0000, 226 .pvr_mask = 0xffff0000,
@@ -224,6 +236,7 @@ struct cpu_spec cpu_specs[] = {
224 .dcache_bsize = 128, 236 .dcache_bsize = 128,
225 .num_pmcs = 6, 237 .num_pmcs = 6,
226 .cpu_setup = __setup_cpu_power4, 238 .cpu_setup = __setup_cpu_power4,
239 .oprofile_cpu_type = "ppc64/power5",
227 }, 240 },
228 { /* BE DD1.x */ 241 { /* BE DD1.x */
229 .pvr_mask = 0xffff0000, 242 .pvr_mask = 0xffff0000,