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authorEugene Surovegin <ebs@ebshome.net>2005-07-30 01:59:19 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-30 13:14:46 -0400
commit5ce17b18e16177dd6409dabd38df5c2c9b58fc2d (patch)
treecbc4e6bac2af443d9c2746c260275fc0b4d9c70b /arch/ppc/platforms/4xx/ocotea.h
parente310fd43256b3cf4d37f6447b8f7413ca744657a (diff)
[PATCH] ppc32: fix 44x early serial debug for configurations with more than 512M of RAM
Fix 44x early serial debugging for big RAM configurations (more than 512M). We cannot use default OpenBIOS virtual mapping, because it interferes with pinned TLB entry. While we are at it, move early UART mapping to TLB slot 0, so it can survive longer during boot process (slot 1 is used by the first ioremap call, effectively killing UART mapping if it occupies this slot). Also, change UART TLB entry size to 4K (256M is too much for a bunch of registers :). Squash some warnings on the way. Tested on Ebony and Ocotea with 1G of RAM. Thanks to Scott Coulter <scott.coulter@cyclone.com> for diagnosing this problem. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/platforms/4xx/ocotea.h')
-rw-r--r--arch/ppc/platforms/4xx/ocotea.h13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ocotea.h b/arch/ppc/platforms/4xx/ocotea.h
index 202dc8251190..33251153ac5f 100644
--- a/arch/ppc/platforms/4xx/ocotea.h
+++ b/arch/ppc/platforms/4xx/ocotea.h
@@ -55,15 +55,24 @@
55 */ 55 */
56#define RS_TABLE_SIZE 2 56#define RS_TABLE_SIZE 2
57 57
58/* OpenBIOS defined UART mappings, used before early_serial_setup */ 58#if defined(__BOOTER__)
59/* OpenBIOS defined UART mappings, used by bootloader shim */
59#define UART0_IO_BASE 0xE0000200 60#define UART0_IO_BASE 0xE0000200
60#define UART1_IO_BASE 0xE0000300 61#define UART1_IO_BASE 0xE0000300
62#else
63/* head_44x.S created UART mapping, used before early_serial_setup.
64 * We cannot use default OpenBIOS UART mappings because they
65 * don't work for configurations with more than 512M RAM. --ebs
66 */
67#define UART0_IO_BASE 0xF0000200
68#define UART1_IO_BASE 0xF0000300
69#endif
61 70
62#define BASE_BAUD 11059200/16 71#define BASE_BAUD 11059200/16
63#define STD_UART_OP(num) \ 72#define STD_UART_OP(num) \
64 { 0, BASE_BAUD, 0, UART##num##_INT, \ 73 { 0, BASE_BAUD, 0, UART##num##_INT, \
65 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ 74 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
66 iomem_base: UART##num##_IO_BASE, \ 75 iomem_base: (void*)UART##num##_IO_BASE, \
67 io_type: SERIAL_IO_MEM}, 76 io_type: SERIAL_IO_MEM},
68 77
69#define SERIAL_PORT_DFNS \ 78#define SERIAL_PORT_DFNS \