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authorKumar Gala <galak@freescale.com>2005-06-25 17:54:37 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-25 19:24:26 -0400
commit33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3 (patch)
treee2ecb071823cc9ffe2755ed117bfabe04a35e1fc /arch/ppc/kernel/cputable.c
parent62aa751d16399637325852bc0a1fcf13c2476dd7 (diff)
[PATCH] ppc32: Add support for Freescale e200 (Book-E) core
The e200 core is a Book-E core (similar to e500) that has a unified L1 cache and is not cache coherent on the bus. The e200 core also adds a separate exception level for debug exceptions. Part of this patch helps to cleanup a few cases that are true for all Freescale Book-E parts, not just e500. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/kernel/cputable.c')
-rw-r--r--arch/ppc/kernel/cputable.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index 01c226008dbf..50936cda0af9 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -903,7 +903,30 @@ struct cpu_spec cpu_specs[] = {
903 .dcache_bsize = 32, 903 .dcache_bsize = 32,
904 }, 904 },
905#endif /* CONFIG_44x */ 905#endif /* CONFIG_44x */
906#ifdef CONFIG_E500 906#ifdef CONFIG_FSL_BOOKE
907 { /* e200z5 */
908 .pvr_mask = 0xfff00000,
909 .pvr_value = 0x81000000,
910 .cpu_name = "e200z5",
911 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
912 .cpu_features = CPU_FTR_USE_TB,
913 .cpu_user_features = PPC_FEATURE_32 |
914 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
915 PPC_FEATURE_UNIFIED_CACHE,
916 .dcache_bsize = 32,
917 },
918 { /* e200z6 */
919 .pvr_mask = 0xfff00000,
920 .pvr_value = 0x81100000,
921 .cpu_name = "e200z6",
922 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
923 .cpu_features = CPU_FTR_USE_TB,
924 .cpu_user_features = PPC_FEATURE_32 |
925 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
926 PPC_FEATURE_HAS_EFP_SINGLE |
927 PPC_FEATURE_UNIFIED_CACHE,
928 .dcache_bsize = 32,
929 },
907 { /* e500 */ 930 { /* e500 */
908 .pvr_mask = 0xffff0000, 931 .pvr_mask = 0xffff0000,
909 .pvr_value = 0x80200000, 932 .pvr_value = 0x80200000,