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authorPaul Mackerras <paulus@samba.org>2008-06-09 00:01:46 -0400
committerPaul Mackerras <paulus@samba.org>2008-06-10 07:40:22 -0400
commit917f0af9e5a9ceecf9e72537fabb501254ba321d (patch)
tree1ef207755c6d83ce4af93ef2b5e4645eebd65886 /arch/ppc/boot/common
parent0f3d6bcd391b058c619fc30e8022e8a29fbf4bef (diff)
powerpc: Remove arch/ppc and include/asm-ppc
All the maintained platforms are now in arch/powerpc, so the old arch/ppc stuff can now go away. Acked-by: Adrian Bunk <bunk@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Becky Bruce <becky.bruce@freescale.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Jochen Friedrich <jochen@scram.de> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: Jon Loeliger <jdl@freescale.com> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Sean MacLennan <smaclennan@pikatech.com> Acked-by: Segher Boessenkool <segher@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/boot/common')
-rw-r--r--arch/ppc/boot/common/Makefile10
-rw-r--r--arch/ppc/boot/common/bootinfo.c68
-rw-r--r--arch/ppc/boot/common/crt0.S80
-rw-r--r--arch/ppc/boot/common/misc-common.c555
-rw-r--r--arch/ppc/boot/common/ns16550.c103
-rw-r--r--arch/ppc/boot/common/serial_stub.c21
-rw-r--r--arch/ppc/boot/common/string.S150
-rw-r--r--arch/ppc/boot/common/util.S293
8 files changed, 0 insertions, 1280 deletions
diff --git a/arch/ppc/boot/common/Makefile b/arch/ppc/boot/common/Makefile
deleted file mode 100644
index a2e85e3beb88..000000000000
--- a/arch/ppc/boot/common/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1# This file is subject to the terms and conditions of the GNU General Public
2# License. See the file "COPYING" in the main directory of this archive
3# for more details.
4#
5# Tom Rini January 2001
6#
7
8lib-y := string.o util.o misc-common.o \
9 serial_stub.o bootinfo.o
10lib-$(CONFIG_SERIAL_8250_CONSOLE) += ns16550.o
diff --git a/arch/ppc/boot/common/bootinfo.c b/arch/ppc/boot/common/bootinfo.c
deleted file mode 100644
index f4dc9b9fab9c..000000000000
--- a/arch/ppc/boot/common/bootinfo.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * General bootinfo record utilities
3 * Author: Randy Vinson <rvinson@mvista.com>
4 *
5 * 2002 (c) MontaVista Software, Inc. This file is licensed under the terms
6 * of the GNU General Public License version 2. This program is licensed
7 * "as is" without any warranty of any kind, whether express or implied.
8 */
9
10#include <linux/types.h>
11#include <linux/string.h>
12#include <asm/bootinfo.h>
13
14#include "nonstdio.h"
15
16static struct bi_record * birec = NULL;
17
18static struct bi_record *
19__bootinfo_build(struct bi_record *rec, unsigned long tag, unsigned long size,
20 void *data)
21{
22 /* set the tag */
23 rec->tag = tag;
24
25 /* if the caller has any data, copy it */
26 if (size)
27 memcpy(rec->data, (char *)data, size);
28
29 /* set the record size */
30 rec->size = sizeof(struct bi_record) + size;
31
32 /* advance to the next available space */
33 rec = (struct bi_record *)((unsigned long)rec + rec->size);
34
35 return rec;
36}
37
38void
39bootinfo_init(struct bi_record *rec)
40{
41
42 /* save start of birec area */
43 birec = rec;
44
45 /* create an empty list */
46 rec = __bootinfo_build(rec, BI_FIRST, 0, NULL);
47 (void) __bootinfo_build(rec, BI_LAST, 0, NULL);
48
49}
50
51void
52bootinfo_append(unsigned long tag, unsigned long size, void * data)
53{
54
55 struct bi_record *rec = birec;
56
57 /* paranoia */
58 if ((rec == NULL) || (rec->tag != BI_FIRST))
59 return;
60
61 /* find the last entry in the list */
62 while (rec->tag != BI_LAST)
63 rec = (struct bi_record *)((ulong)rec + rec->size);
64
65 /* overlay BI_LAST record with new one and tag on a new BI_LAST */
66 rec = __bootinfo_build(rec, tag, size, data);
67 (void) __bootinfo_build(rec, BI_LAST, 0, NULL);
68}
diff --git a/arch/ppc/boot/common/crt0.S b/arch/ppc/boot/common/crt0.S
deleted file mode 100644
index 8f0ef04b8de5..000000000000
--- a/arch/ppc/boot/common/crt0.S
+++ /dev/null
@@ -1,80 +0,0 @@
1/* Copyright (c) 1997 Paul Mackerras <paulus@cs.anu.edu.au>
2 * Initial Power Macintosh COFF version.
3 * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
4 * Modifications for IBM PowerPC 400-class processor evaluation
5 * boards.
6 *
7 * Module name: crt0.S
8 *
9 * Description:
10 * Boot loader execution entry point. Clears out .bss section as per
11 * ANSI C requirements. Invalidates and flushes the caches over the
12 * range covered by the boot loader's .text section. Sets up a stack
13 * below the .text section entry point.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 */
20
21#include <asm/ppc_asm.h>
22
23 .text
24
25 .globl _start
26_start:
27#ifdef XCOFF
28 .long __start,0,0
29
30 .globl __start
31__start:
32#endif
33
34 ## Flush and invalidate the caches for the range in memory covering
35 ## the .text section of the boot loader
36
37 lis r9,_start@h # r9 = &_start
38 lis r8,_etext@ha #
39 addi r8,r8,_etext@l # r8 = &_etext
403: dcbf r0,r9 # Flush the data cache
41 icbi r0,r9 # Invalidate the instruction cache
42 addi r9,r9,0x10 # Increment by one cache line
43 cmplw cr0,r9,r8 # Are we at the end yet?
44 blt 3b # No, keep flushing and invalidating
45 sync # sync ; isync after flushing the icache
46 isync
47
48 ## Clear out the BSS as per ANSI C requirements
49
50 lis r7,_end@ha
51 addi r7,r7,_end@l # r7 = &_end
52 lis r8,__bss_start@ha #
53 addi r8,r8,__bss_start@l # r8 = &_bss_start
54
55 ## Determine how large an area, in number of words, to clear
56
57 subf r7,r8,r7 # r7 = &_end - &_bss_start + 1
58 addi r7,r7,3 # r7 += 3
59 srwi. r7,r7,2 # r7 = size in words.
60 beq 2f # If the size is zero, do not bother
61 addi r8,r8,-4 # r8 -= 4
62 mtctr r7 # SPRN_CTR = number of words to clear
63 li r0,0 # r0 = 0
641: stwu r0,4(r8) # Clear out a word
65 bdnz 1b # If we are not done yet, keep clearing
662:
67
68#ifdef CONFIG_40x
69 ## Set up the stack
70
71 lis r9,_start@h # r9 = &_start (text section entry)
72 ori r9,r9,_start@l
73 subi r1,r9,64 # Start the stack 64 bytes below _start
74 clrrwi r1,r1,4 # Make sure it is aligned on 16 bytes.
75 li r0,0
76 stwu r0,-16(r1)
77 mtlr r9
78#endif
79
80 b start # All done, start the real work.
diff --git a/arch/ppc/boot/common/misc-common.c b/arch/ppc/boot/common/misc-common.c
deleted file mode 100644
index 9589969cec72..000000000000
--- a/arch/ppc/boot/common/misc-common.c
+++ /dev/null
@@ -1,555 +0,0 @@
1/*
2 * Misc. bootloader code (almost) all platforms can use
3 *
4 * Author: Johnnie Peters <jpeters@mvista.com>
5 * Editor: Tom Rini <trini@mvista.com>
6 *
7 * Derived from arch/ppc/boot/prep/misc.c
8 *
9 * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14
15#include <stdarg.h> /* for va_ bits */
16#include <linux/string.h>
17#include <linux/zlib.h>
18#include "nonstdio.h"
19
20/* If we're on a PReP, assume we have a keyboard controller
21 * Also note, if we're not PReP, we assume you are a serial
22 * console - Tom */
23#if defined(CONFIG_PPC_PREP) && defined(CONFIG_VGA_CONSOLE)
24extern void cursor(int x, int y);
25extern void scroll(void);
26extern char *vidmem;
27extern int lines, cols;
28extern int orig_x, orig_y;
29extern int keyb_present;
30extern int CRT_tstc(void);
31extern int CRT_getc(void);
32#else
33int cursor(int x, int y) {return 0;}
34void scroll(void) {}
35char vidmem[1];
36#define lines 0
37#define cols 0
38int orig_x = 0;
39int orig_y = 0;
40#define keyb_present 0
41int CRT_tstc(void) {return 0;}
42int CRT_getc(void) {return 0;}
43#endif
44
45extern char *avail_ram;
46extern char *end_avail;
47extern char _end[];
48
49void puts(const char *);
50void putc(const char c);
51void puthex(unsigned long val);
52void gunzip(void *, int, unsigned char *, int *);
53static int _cvt(unsigned long val, char *buf, long radix, char *digits);
54
55void _vprintk(void(*putc)(const char), const char *fmt0, va_list ap);
56unsigned char *ISA_io = NULL;
57
58#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
59 || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
60 || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
61 || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
62extern unsigned long com_port;
63
64extern int serial_tstc(unsigned long com_port);
65extern unsigned char serial_getc(unsigned long com_port);
66extern void serial_putc(unsigned long com_port, unsigned char c);
67#endif
68
69void pause(void)
70{
71 puts("pause\n");
72}
73
74void exit(void)
75{
76 puts("exit\n");
77 while(1);
78}
79
80int tstc(void)
81{
82#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
83 || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
84 || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
85 || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
86 if(keyb_present)
87 return (CRT_tstc() || serial_tstc(com_port));
88 else
89 return (serial_tstc(com_port));
90#else
91 return CRT_tstc();
92#endif
93}
94
95int getc(void)
96{
97 while (1) {
98#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
99 || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
100 || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
101 || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
102 if (serial_tstc(com_port))
103 return (serial_getc(com_port));
104#endif /* serial console */
105 if (keyb_present)
106 if(CRT_tstc())
107 return (CRT_getc());
108 }
109}
110
111void
112putc(const char c)
113{
114 int x,y;
115
116#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
117 || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
118 || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
119 || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
120 serial_putc(com_port, c);
121 if ( c == '\n' )
122 serial_putc(com_port, '\r');
123#endif /* serial console */
124
125 x = orig_x;
126 y = orig_y;
127
128 if ( c == '\n' ) {
129 x = 0;
130 if ( ++y >= lines ) {
131 scroll();
132 y--;
133 }
134 } else if (c == '\r') {
135 x = 0;
136 } else if (c == '\b') {
137 if (x > 0) {
138 x--;
139 }
140 } else {
141 vidmem [ ( x + cols * y ) * 2 ] = c;
142 if ( ++x >= cols ) {
143 x = 0;
144 if ( ++y >= lines ) {
145 scroll();
146 y--;
147 }
148 }
149 }
150
151 cursor(x, y);
152
153 orig_x = x;
154 orig_y = y;
155}
156
157void puts(const char *s)
158{
159 int x,y;
160 char c;
161
162 x = orig_x;
163 y = orig_y;
164
165 while ( ( c = *s++ ) != '\0' ) {
166#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
167 || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
168 || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
169 || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
170 serial_putc(com_port, c);
171 if ( c == '\n' ) serial_putc(com_port, '\r');
172#endif /* serial console */
173
174 if ( c == '\n' ) {
175 x = 0;
176 if ( ++y >= lines ) {
177 scroll();
178 y--;
179 }
180 } else if (c == '\b') {
181 if (x > 0) {
182 x--;
183 }
184 } else {
185 vidmem [ ( x + cols * y ) * 2 ] = c;
186 if ( ++x >= cols ) {
187 x = 0;
188 if ( ++y >= lines ) {
189 scroll();
190 y--;
191 }
192 }
193 }
194 }
195
196 cursor(x, y);
197
198 orig_x = x;
199 orig_y = y;
200}
201
202void error(char *x)
203{
204 puts("\n\n");
205 puts(x);
206 puts("\n\n -- System halted");
207
208 while(1); /* Halt */
209}
210
211static void *zalloc(unsigned size)
212{
213 void *p = avail_ram;
214
215 size = (size + 7) & -8;
216 avail_ram += size;
217 if (avail_ram > end_avail) {
218 puts("oops... out of memory\n");
219 pause();
220 }
221 return p;
222}
223
224#define HEAD_CRC 2
225#define EXTRA_FIELD 4
226#define ORIG_NAME 8
227#define COMMENT 0x10
228#define RESERVED 0xe0
229
230void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
231{
232 z_stream s;
233 int r, i, flags;
234
235 /* skip header */
236 i = 10;
237 flags = src[3];
238 if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) {
239 puts("bad gzipped data\n");
240 exit();
241 }
242 if ((flags & EXTRA_FIELD) != 0)
243 i = 12 + src[10] + (src[11] << 8);
244 if ((flags & ORIG_NAME) != 0)
245 while (src[i++] != 0)
246 ;
247 if ((flags & COMMENT) != 0)
248 while (src[i++] != 0)
249 ;
250 if ((flags & HEAD_CRC) != 0)
251 i += 2;
252 if (i >= *lenp) {
253 puts("gunzip: ran out of data in header\n");
254 exit();
255 }
256
257 /* Initialize ourself. */
258 s.workspace = zalloc(zlib_inflate_workspacesize());
259 r = zlib_inflateInit2(&s, -MAX_WBITS);
260 if (r != Z_OK) {
261 puts("zlib_inflateInit2 returned "); puthex(r); puts("\n");
262 exit();
263 }
264 s.next_in = src + i;
265 s.avail_in = *lenp - i;
266 s.next_out = dst;
267 s.avail_out = dstlen;
268 r = zlib_inflate(&s, Z_FINISH);
269 if (r != Z_OK && r != Z_STREAM_END) {
270 puts("inflate returned "); puthex(r); puts("\n");
271 exit();
272 }
273 *lenp = s.next_out - (unsigned char *) dst;
274 zlib_inflateEnd(&s);
275}
276
277void
278puthex(unsigned long val)
279{
280
281 unsigned char buf[10];
282 int i;
283 for (i = 7; i >= 0; i--)
284 {
285 buf[i] = "0123456789ABCDEF"[val & 0x0F];
286 val >>= 4;
287 }
288 buf[8] = '\0';
289 puts(buf);
290}
291
292#define FALSE 0
293#define TRUE 1
294
295void
296_printk(char const *fmt, ...)
297{
298 va_list ap;
299
300 va_start(ap, fmt);
301 _vprintk(putc, fmt, ap);
302 va_end(ap);
303 return;
304}
305
306#define is_digit(c) ((c >= '0') && (c <= '9'))
307
308void
309_vprintk(void(*putc)(const char), const char *fmt0, va_list ap)
310{
311 char c, sign, *cp = 0;
312 int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right;
313 char buf[32];
314 long val;
315 while ((c = *fmt0++))
316 {
317 if (c == '%')
318 {
319 c = *fmt0++;
320 left_prec = right_prec = pad_on_right = 0;
321 if (c == '-')
322 {
323 c = *fmt0++;
324 pad_on_right++;
325 }
326 if (c == '0')
327 {
328 zero_fill = TRUE;
329 c = *fmt0++;
330 } else
331 {
332 zero_fill = FALSE;
333 }
334 while (is_digit(c))
335 {
336 left_prec = (left_prec * 10) + (c - '0');
337 c = *fmt0++;
338 }
339 if (c == '.')
340 {
341 c = *fmt0++;
342 zero_fill++;
343 while (is_digit(c))
344 {
345 right_prec = (right_prec * 10) + (c - '0');
346 c = *fmt0++;
347 }
348 } else
349 {
350 right_prec = left_prec;
351 }
352 sign = '\0';
353 switch (c)
354 {
355 case 'd':
356 case 'x':
357 case 'X':
358 val = va_arg(ap, long);
359 switch (c)
360 {
361 case 'd':
362 if (val < 0)
363 {
364 sign = '-';
365 val = -val;
366 }
367 length = _cvt(val, buf, 10, "0123456789");
368 break;
369 case 'x':
370 length = _cvt(val, buf, 16, "0123456789abcdef");
371 break;
372 case 'X':
373 length = _cvt(val, buf, 16, "0123456789ABCDEF");
374 break;
375 }
376 cp = buf;
377 break;
378 case 's':
379 cp = va_arg(ap, char *);
380 length = strlen(cp);
381 break;
382 case 'c':
383 c = va_arg(ap, long /*char*/);
384 (*putc)(c);
385 continue;
386 default:
387 (*putc)('?');
388 }
389 pad = left_prec - length;
390 if (sign != '\0')
391 {
392 pad--;
393 }
394 if (zero_fill)
395 {
396 c = '0';
397 if (sign != '\0')
398 {
399 (*putc)(sign);
400 sign = '\0';
401 }
402 } else
403 {
404 c = ' ';
405 }
406 if (!pad_on_right)
407 {
408 while (pad-- > 0)
409 {
410 (*putc)(c);
411 }
412 }
413 if (sign != '\0')
414 {
415 (*putc)(sign);
416 }
417 while (length-- > 0)
418 {
419 (*putc)(c = *cp++);
420 if (c == '\n')
421 {
422 (*putc)('\r');
423 }
424 }
425 if (pad_on_right)
426 {
427 while (pad-- > 0)
428 {
429 (*putc)(c);
430 }
431 }
432 } else
433 {
434 (*putc)(c);
435 if (c == '\n')
436 {
437 (*putc)('\r');
438 }
439 }
440 }
441}
442
443int
444_cvt(unsigned long val, char *buf, long radix, char *digits)
445{
446 char temp[80];
447 char *cp = temp;
448 int length = 0;
449 if (val == 0)
450 { /* Special case */
451 *cp++ = '0';
452 } else
453 while (val)
454 {
455 *cp++ = digits[val % radix];
456 val /= radix;
457 }
458 while (cp != temp)
459 {
460 *buf++ = *--cp;
461 length++;
462 }
463 *buf = '\0';
464 return (length);
465}
466
467void
468_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base)
469{
470 int i, c;
471 if ((unsigned int)s > (unsigned int)p)
472 {
473 s = (unsigned int)s - (unsigned int)p;
474 }
475 while (s > 0)
476 {
477 if (base)
478 {
479 _printk("%06X: ", (int)p - (int)base);
480 } else
481 {
482 _printk("%06X: ", p);
483 }
484 for (i = 0; i < 16; i++)
485 {
486 if (i < s)
487 {
488 _printk("%02X", p[i] & 0xFF);
489 } else
490 {
491 _printk(" ");
492 }
493 if ((i % 2) == 1) _printk(" ");
494 if ((i % 8) == 7) _printk(" ");
495 }
496 _printk(" |");
497 for (i = 0; i < 16; i++)
498 {
499 if (i < s)
500 {
501 c = p[i] & 0xFF;
502 if ((c < 0x20) || (c >= 0x7F)) c = '.';
503 } else
504 {
505 c = ' ';
506 }
507 _printk("%c", c);
508 }
509 _printk("|\n");
510 s -= 16;
511 p += 16;
512 }
513}
514
515void
516_dump_buf(unsigned char *p, int s)
517{
518 _printk("\n");
519 _dump_buf_with_offset(p, s, 0);
520}
521
522/* Very simple inb/outb routines. We declare ISA_io to be 0 above, and
523 * then modify it on platforms which need to. We do it like this
524 * because on some platforms we give inb/outb an exact location, and
525 * on others it's an offset from a given location. -- Tom
526 */
527
528void ISA_init(unsigned long base)
529{
530 ISA_io = (unsigned char *)base;
531}
532
533void
534outb(int port, unsigned char val)
535{
536 /* Ensure I/O operations complete */
537 __asm__ volatile("eieio");
538 ISA_io[port] = val;
539}
540
541unsigned char
542inb(int port)
543{
544 /* Ensure I/O operations complete */
545 __asm__ volatile("eieio");
546 return (ISA_io[port]);
547}
548
549/*
550 * Local variables:
551 * c-indent-level: 8
552 * c-basic-offset: 8
553 * tab-width: 8
554 * End:
555 */
diff --git a/arch/ppc/boot/common/ns16550.c b/arch/ppc/boot/common/ns16550.c
deleted file mode 100644
index fc5b72041948..000000000000
--- a/arch/ppc/boot/common/ns16550.c
+++ /dev/null
@@ -1,103 +0,0 @@
1/*
2 * COM1 NS16550 support
3 */
4
5#include <linux/types.h>
6#include <linux/serial.h>
7#include <linux/serial_reg.h>
8#include <asm/serial.h>
9
10#if defined(CONFIG_XILINX_VIRTEX)
11#include <platforms/4xx/xparameters/xparameters.h>
12#endif
13#include "nonstdio.h"
14#include "serial.h"
15
16#define SERIAL_BAUD 9600
17
18extern unsigned long ISA_io;
19
20static struct serial_state rs_table[RS_TABLE_SIZE] = {
21 SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
22};
23
24static int shift;
25
26unsigned long serial_init(int chan, void *ignored)
27{
28 unsigned long com_port, base_baud;
29 unsigned char lcr, dlm;
30
31 /* We need to find out which type io we're expecting. If it's
32 * 'SERIAL_IO_PORT', we get an offset from the isa_io_base.
33 * If it's 'SERIAL_IO_MEM', we can the exact location. -- Tom */
34 switch (rs_table[chan].io_type) {
35 case SERIAL_IO_PORT:
36 com_port = rs_table[chan].port;
37 break;
38 case SERIAL_IO_MEM:
39 com_port = (unsigned long)rs_table[chan].iomem_base;
40 break;
41 default:
42 /* We can't deal with it. */
43 return -1;
44 }
45
46 /* How far apart the registers are. */
47 shift = rs_table[chan].iomem_reg_shift;
48 /* Base baud.. */
49 base_baud = rs_table[chan].baud_base;
50
51 /* save the LCR */
52 lcr = inb(com_port + (UART_LCR << shift));
53 /* Access baud rate */
54 outb(com_port + (UART_LCR << shift), 0x80);
55 dlm = inb(com_port + (UART_DLM << shift));
56 /*
57 * Test if serial port is unconfigured.
58 * We assume that no-one uses less than 110 baud or
59 * less than 7 bits per character these days.
60 * -- paulus.
61 */
62
63 if ((dlm <= 4) && (lcr & 2))
64 /* port is configured, put the old LCR back */
65 outb(com_port + (UART_LCR << shift), lcr);
66 else {
67 /* Input clock. */
68 outb(com_port + (UART_DLL << shift),
69 (base_baud / SERIAL_BAUD) & 0xFF);
70 outb(com_port + (UART_DLM << shift),
71 (base_baud / SERIAL_BAUD) >> 8);
72 /* 8 data, 1 stop, no parity */
73 outb(com_port + (UART_LCR << shift), 0x03);
74 /* RTS/DTR */
75 outb(com_port + (UART_MCR << shift), 0x03);
76 }
77 /* Clear & enable FIFOs */
78 outb(com_port + (UART_FCR << shift), 0x07);
79
80 return (com_port);
81}
82
83void
84serial_putc(unsigned long com_port, unsigned char c)
85{
86 while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_THRE) == 0)
87 ;
88 outb(com_port, c);
89}
90
91unsigned char
92serial_getc(unsigned long com_port)
93{
94 while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) == 0)
95 ;
96 return inb(com_port);
97}
98
99int
100serial_tstc(unsigned long com_port)
101{
102 return ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) != 0);
103}
diff --git a/arch/ppc/boot/common/serial_stub.c b/arch/ppc/boot/common/serial_stub.c
deleted file mode 100644
index 5cc9ae66a8ba..000000000000
--- a/arch/ppc/boot/common/serial_stub.c
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * This is a few stub routines to make the boot code cleaner looking when
3 * there is no serial port support doesn't need to be closed, for example.
4 *
5 * Author: Tom Rini <trini@mvista.com>
6 *
7 * 2003 (c) MontaVista, Software, Inc. This file is licensed under the terms
8 * of the GNU General Public License version 2. This program is licensed "as
9 * is" without any warranty of any kind, whether express or implied.
10 */
11
12unsigned long __attribute__ ((weak))
13serial_init(int chan, void *ignored)
14{
15 return 0;
16}
17
18void __attribute__ ((weak))
19serial_close(unsigned long com_port)
20{
21}
diff --git a/arch/ppc/boot/common/string.S b/arch/ppc/boot/common/string.S
deleted file mode 100644
index 8016e43c4771..000000000000
--- a/arch/ppc/boot/common/string.S
+++ /dev/null
@@ -1,150 +0,0 @@
1/*
2 * String handling functions for PowerPC.
3 *
4 * Copyright (C) 1996 Paul Mackerras.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#define r0 0
12#define r3 3
13#define r4 4
14#define r5 5
15#define r6 6
16#define r7 7
17#define r8 8
18
19 .globl strlen
20strlen:
21 addi r4,r3,-1
221: lbzu r0,1(r4)
23 cmpwi 0,r0,0
24 bne 1b
25 subf r3,r3,r4
26 blr
27
28 .globl memset
29memset:
30 rlwimi r4,r4,8,16,23
31 rlwimi r4,r4,16,0,15
32 addi r6,r3,-4
33 cmplwi 0,r5,4
34 blt 7f
35 stwu r4,4(r6)
36 beqlr
37 andi. r0,r6,3
38 add r5,r0,r5
39 subf r6,r0,r6
40 rlwinm r0,r5,32-2,2,31
41 mtctr r0
42 bdz 6f
431: stwu r4,4(r6)
44 bdnz 1b
456: andi. r5,r5,3
467: cmpwi 0,r5,0
47 beqlr
48 mtctr r5
49 addi r6,r6,3
508: stbu r4,1(r6)
51 bdnz 8b
52 blr
53
54 .globl memmove
55memmove:
56 cmplw 0,r3,r4
57 bgt backwards_memcpy
58 /* fall through */
59
60 .globl memcpy
61memcpy:
62 rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
63 addi r6,r3,-4
64 addi r4,r4,-4
65 beq 2f /* if less than 8 bytes to do */
66 andi. r0,r6,3 /* get dest word aligned */
67 mtctr r7
68 bne 5f
691: lwz r7,4(r4)
70 lwzu r8,8(r4)
71 stw r7,4(r6)
72 stwu r8,8(r6)
73 bdnz 1b
74 andi. r5,r5,7
752: cmplwi 0,r5,4
76 blt 3f
77 lwzu r0,4(r4)
78 addi r5,r5,-4
79 stwu r0,4(r6)
803: cmpwi 0,r5,0
81 beqlr
82 mtctr r5
83 addi r4,r4,3
84 addi r6,r6,3
854: lbzu r0,1(r4)
86 stbu r0,1(r6)
87 bdnz 4b
88 blr
895: subfic r0,r0,4
90 mtctr r0
916: lbz r7,4(r4)
92 addi r4,r4,1
93 stb r7,4(r6)
94 addi r6,r6,1
95 bdnz 6b
96 subf r5,r0,r5
97 rlwinm. r7,r5,32-3,3,31
98 beq 2b
99 mtctr r7
100 b 1b
101
102 .globl backwards_memcpy
103backwards_memcpy:
104 rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
105 add r6,r3,r5
106 add r4,r4,r5
107 beq 2f
108 andi. r0,r6,3
109 mtctr r7
110 bne 5f
1111: lwz r7,-4(r4)
112 lwzu r8,-8(r4)
113 stw r7,-4(r6)
114 stwu r8,-8(r6)
115 bdnz 1b
116 andi. r5,r5,7
1172: cmplwi 0,r5,4
118 blt 3f
119 lwzu r0,-4(r4)
120 subi r5,r5,4
121 stwu r0,-4(r6)
1223: cmpwi 0,r5,0
123 beqlr
124 mtctr r5
1254: lbzu r0,-1(r4)
126 stbu r0,-1(r6)
127 bdnz 4b
128 blr
1295: mtctr r0
1306: lbzu r7,-1(r4)
131 stbu r7,-1(r6)
132 bdnz 6b
133 subf r5,r0,r5
134 rlwinm. r7,r5,32-3,3,31
135 beq 2b
136 mtctr r7
137 b 1b
138
139 .globl memcmp
140memcmp:
141 cmpwi 0,r5,0
142 blelr
143 mtctr r5
144 addi r6,r3,-1
145 addi r4,r4,-1
1461: lbzu r3,1(r6)
147 lbzu r0,1(r4)
148 subf. r3,r0,r3
149 bdnzt 2,1b
150 blr
diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S
deleted file mode 100644
index 0c5e43c4ae06..000000000000
--- a/arch/ppc/boot/common/util.S
+++ /dev/null
@@ -1,293 +0,0 @@
1/*
2 * Useful bootup functions, which are more easily done in asm than C.
3 *
4 * NOTE: Be very very careful about the registers you use here.
5 * We don't follow any ABI calling convention among the
6 * assembler functions that call each other, especially early
7 * in the initialization. Please preserve at least r3 and r4
8 * for these early functions, as they often contain information
9 * passed from boot roms into the C decompress function.
10 *
11 * Author: Tom Rini
12 * trini@mvista.com
13 * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
14 *
15 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
16 * the terms of the GNU General Public License version 2. This program
17 * is licensed "as is" without any warranty of any kind, whether express
18 * or implied.
19 */
20
21#include <asm/processor.h>
22#include <asm/cache.h>
23#include <asm/ppc_asm.h>
24
25
26 .text
27
28#ifdef CONFIG_6xx
29 .globl disable_6xx_mmu
30disable_6xx_mmu:
31 /* Establish default MSR value, exception prefix 0xFFF.
32 * If necessary, this function must fix up the LR if we
33 * return to a different address space once the MMU is
34 * disabled.
35 */
36 li r8,MSR_IP|MSR_FP
37 mtmsr r8
38 isync
39
40 /* Test for a 601 */
41 mfpvr r10
42 srwi r10,r10,16
43 cmpwi 0,r10,1 /* 601 ? */
44 beq .clearbats_601
45
46 /* Clear BATs */
47 li r8,0
48 mtspr SPRN_DBAT0U,r8
49 mtspr SPRN_DBAT0L,r8
50 mtspr SPRN_DBAT1U,r8
51 mtspr SPRN_DBAT1L,r8
52 mtspr SPRN_DBAT2U,r8
53 mtspr SPRN_DBAT2L,r8
54 mtspr SPRN_DBAT3U,r8
55 mtspr SPRN_DBAT3L,r8
56.clearbats_601:
57 mtspr SPRN_IBAT0U,r8
58 mtspr SPRN_IBAT0L,r8
59 mtspr SPRN_IBAT1U,r8
60 mtspr SPRN_IBAT1L,r8
61 mtspr SPRN_IBAT2U,r8
62 mtspr SPRN_IBAT2L,r8
63 mtspr SPRN_IBAT3U,r8
64 mtspr SPRN_IBAT3L,r8
65 isync
66 sync
67 sync
68
69 /* Set segment registers */
70 li r8,16 /* load up segment register values */
71 mtctr r8 /* for context 0 */
72 lis r8,0x2000 /* Ku = 1, VSID = 0 */
73 li r10,0
743: mtsrin r8,r10
75 addi r8,r8,0x111 /* increment VSID */
76 addis r10,r10,0x1000 /* address of next segment */
77 bdnz 3b
78 blr
79
80 .globl disable_6xx_l1cache
81disable_6xx_l1cache:
82 /* Enable, invalidate and then disable the L1 icache/dcache. */
83 li r8,0
84 ori r8,r8,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI)
85 mfspr r11,SPRN_HID0
86 or r11,r11,r8
87 andc r10,r11,r8
88 isync
89 mtspr SPRN_HID0,r8
90 sync
91 isync
92 mtspr SPRN_HID0,r10
93 sync
94 isync
95 blr
96#endif
97
98 .globl _setup_L2CR
99_setup_L2CR:
100/*
101 * We should be skipping this section on CPUs where this results in an
102 * illegal instruction. If not, please send trini@kernel.crashing.org
103 * the PVR of your CPU.
104 */
105 /* Invalidate/disable L2 cache */
106 sync
107 isync
108 mfspr r8,SPRN_L2CR
109 rlwinm r8,r8,0,1,31
110 oris r8,r8,L2CR_L2I@h
111 sync
112 isync
113 mtspr SPRN_L2CR,r8
114 sync
115 isync
116
117 /* Wait for the invalidation to complete */
118 mfspr r8,SPRN_PVR
119 srwi r8,r8,16
120 cmplwi cr0,r8,0x8000 /* 7450 */
121 cmplwi cr1,r8,0x8001 /* 7455 */
122 cmplwi cr2,r8,0x8002 /* 7457 */
123 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq /* Now test if any are true. */
124 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
125 bne 2f
126
1271: mfspr r8,SPRN_L2CR /* On 745x, poll L2I bit (bit 10) */
128 rlwinm. r9,r8,0,10,10
129 bne 1b
130 b 3f
131
1322: mfspr r8,SPRN_L2CR /* On 75x & 74[01]0, poll L2IP bit (bit 31) */
133 rlwinm. r9,r8,0,31,31
134 bne 2b
135
1363: rlwinm r8,r8,0,11,9 /* Turn off L2I bit */
137 sync
138 isync
139 mtspr SPRN_L2CR,r8
140 sync
141 isync
142 blr
143
144 .globl _setup_L3CR
145_setup_L3CR:
146 /* Invalidate/disable L3 cache */
147 sync
148 isync
149 mfspr r8,SPRN_L3CR
150 rlwinm r8,r8,0,1,31
151 ori r8,r8,L3CR_L3I@l
152 sync
153 isync
154 mtspr SPRN_L3CR,r8
155 sync
156 isync
157
158 /* Wait for the invalidation to complete */
1591: mfspr r8,SPRN_L3CR
160 rlwinm. r9,r8,0,21,21
161 bne 1b
162
163 rlwinm r8,r8,0,22,20 /* Turn off L3I bit */
164 sync
165 isync
166 mtspr SPRN_L3CR,r8
167 sync
168 isync
169 blr
170
171
172/* udelay (on non-601 processors) needs to know the period of the
173 * timebase in nanoseconds. This used to be hardcoded to be 60ns
174 * (period of 66MHz/4). Now a variable is used that is initialized to
175 * 60 for backward compatibility, but it can be overridden as necessary
176 * with code something like this:
177 * extern unsigned long timebase_period_ns;
178 * timebase_period_ns = 1000000000 / bd->bi_tbfreq;
179 */
180 .data
181 .globl timebase_period_ns
182timebase_period_ns:
183 .long 60
184
185 .text
186/*
187 * Delay for a number of microseconds
188 */
189 .globl udelay
190udelay:
191 mfspr r4,SPRN_PVR
192 srwi r4,r4,16
193 cmpwi 0,r4,1 /* 601 ? */
194 bne .udelay_not_601
19500: li r0,86 /* Instructions / microsecond? */
196 mtctr r0
19710: addi r0,r0,0 /* NOP */
198 bdnz 10b
199 subic. r3,r3,1
200 bne 00b
201 blr
202
203.udelay_not_601:
204 mulli r4,r3,1000 /* nanoseconds */
205 /* Change r4 to be the number of ticks using:
206 * (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns
207 * timebase_period_ns defaults to 60 (16.6MHz) */
208 lis r5,timebase_period_ns@ha
209 lwz r5,timebase_period_ns@l(r5)
210 add r4,r4,r5
211 addi r4,r4,-1
212 divw r4,r4,r5 /* BUS ticks */
2131: mftbu r5
214 mftb r6
215 mftbu r7
216 cmpw 0,r5,r7
217 bne 1b /* Get [synced] base time */
218 addc r9,r6,r4 /* Compute end time */
219 addze r8,r5
2202: mftbu r5
221 cmpw 0,r5,r8
222 blt 2b
223 bgt 3f
224 mftb r6
225 cmpw 0,r6,r9
226 blt 2b
2273: blr
228
229 .section ".relocate_code","xa"
230/*
231 * Flush and enable instruction cache
232 * First, flush the data cache in case it was enabled and may be
233 * holding instructions for copy back.
234 */
235 .globl flush_instruction_cache
236flush_instruction_cache:
237 mflr r6
238 bl flush_data_cache
239
240#ifdef CONFIG_8xx
241 lis r3, IDC_INVALL@h
242 mtspr SPRN_IC_CST, r3
243 lis r3, IDC_ENABLE@h
244 mtspr SPRN_IC_CST, r3
245 lis r3, IDC_DISABLE@h
246 mtspr SPRN_DC_CST, r3
247#elif CONFIG_4xx
248 lis r3,start@h # r9 = &_start
249 lis r4,_etext@ha
250 addi r4,r4,_etext@l # r8 = &_etext
2511: dcbf r0,r3 # Flush the data cache
252 icbi r0,r3 # Invalidate the instruction cache
253 addi r3,r3,0x10 # Increment by one cache line
254 cmplw cr0,r3,r4 # Are we at the end yet?
255 blt 1b # No, keep flushing and invalidating
256#else
257 /* Enable, invalidate and then disable the L1 icache/dcache. */
258 li r3,0
259 ori r3,r3,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI)
260 mfspr r4,SPRN_HID0
261 or r5,r4,r3
262 isync
263 mtspr SPRN_HID0,r5
264 sync
265 isync
266 ori r5,r4,HID0_ICE /* Enable cache */
267 mtspr SPRN_HID0,r5
268 sync
269 isync
270#endif
271 mtlr r6
272 blr
273
274#define NUM_CACHE_LINES 128*8
275#define cache_flush_buffer 0x1000
276
277/*
278 * Flush data cache
279 * Do this by just reading lots of stuff into the cache.
280 */
281 .globl flush_data_cache
282flush_data_cache:
283 lis r3,cache_flush_buffer@h
284 ori r3,r3,cache_flush_buffer@l
285 li r4,NUM_CACHE_LINES
286 mtctr r4
28700: lwz r4,0(r3)
288 addi r3,r3,L1_CACHE_BYTES /* Next line, please */
289 bdnz 00b
29010: blr
291
292 .previous
293
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