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authorKumar Gala <galak@kernel.crashing.org>2006-06-28 01:37:45 -0400
committerKumar Gala <galak@kernel.crashing.org>2006-06-28 01:37:45 -0400
commit9ad494f62444ee37209e85173377c67612e66ef1 (patch)
tree7f0cf7697b62120179deda730365f4715947a05a /arch/powerpc
parentfcc18e83e1f6fd9fa6b333735bf0fcd530655511 (diff)
powerpc: minor cleanups for mpc86xx
* Remove duplicated cputable entry for 8641 (matches w/7448) * Removed __init from function prototypes in mpc86xx.h * Moved pci fixups into board specific code * Moved mpc86xx_exclude_device to generic mpc86xx pci code * Fixed sparse warnings in mpc86xx_smp.c * Removed board specific header include from asm-powerpc/mpc86xx.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kernel/cputable.c12
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx.h8
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c128
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_smp.c9
-rw-r--r--arch/powerpc/platforms/86xx/pci.c136
5 files changed, 138 insertions, 155 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 1c114880dc05..abf7d42a8b07 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -722,18 +722,6 @@ struct cpu_spec cpu_specs[] = {
722 .oprofile_type = PPC_OPROFILE_G4, 722 .oprofile_type = PPC_OPROFILE_G4,
723 .platform = "ppc7450", 723 .platform = "ppc7450",
724 }, 724 },
725 { /* 8641 */
726 .pvr_mask = 0xffffffff,
727 .pvr_value = 0x80040010,
728 .cpu_name = "8641",
729 .cpu_features = CPU_FTRS_7447A,
730 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
731 .icache_bsize = 32,
732 .dcache_bsize = 32,
733 .num_pmcs = 6,
734 .cpu_setup = __setup_cpu_745x
735 },
736
737 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 725 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
738 .pvr_mask = 0x7fff0000, 726 .pvr_mask = 0x7fff0000,
739 .pvr_value = 0x00810000, 727 .pvr_value = 0x00810000,
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h
index e3c9e4f417d3..2834462590b8 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx.h
+++ b/arch/powerpc/platforms/86xx/mpc86xx.h
@@ -15,11 +15,13 @@
15 * mpc86xx_* files. Mostly for use by mpc86xx_setup(). 15 * mpc86xx_* files. Mostly for use by mpc86xx_setup().
16 */ 16 */
17 17
18extern int __init add_bridge(struct device_node *dev); 18extern int add_bridge(struct device_node *dev);
19 19
20extern void __init setup_indirect_pcie(struct pci_controller *hose, 20extern int mpc86xx_exclude_device(u_char bus, u_char devfn);
21
22extern void setup_indirect_pcie(struct pci_controller *hose,
21 u32 cfg_addr, u32 cfg_data); 23 u32 cfg_addr, u32 cfg_data);
22extern void __init setup_indirect_pcie_nomap(struct pci_controller *hose, 24extern void setup_indirect_pcie_nomap(struct pci_controller *hose,
23 void __iomem *cfg_addr, 25 void __iomem *cfg_addr,
24 void __iomem *cfg_data); 26 void __iomem *cfg_data);
25 27
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 483c21df181e..ac7f41802e94 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -36,6 +36,7 @@
36#include <sysdev/fsl_soc.h> 36#include <sysdev/fsl_soc.h>
37 37
38#include "mpc86xx.h" 38#include "mpc86xx.h"
39#include "mpc8641_hpcn.h"
39 40
40#ifndef CONFIG_PCI 41#ifndef CONFIG_PCI
41unsigned long isa_io_base = 0; 42unsigned long isa_io_base = 0;
@@ -186,17 +187,130 @@ mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
186 return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; 187 return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET;
187} 188}
188 189
190static void __devinit quirk_ali1575(struct pci_dev *dev)
191{
192 unsigned short temp;
193
194 /*
195 * ALI1575 interrupts route table setup:
196 *
197 * IRQ pin IRQ#
198 * PIRQA ---- 3
199 * PIRQB ---- 4
200 * PIRQC ---- 5
201 * PIRQD ---- 6
202 * PIRQE ---- 9
203 * PIRQF ---- 10
204 * PIRQG ---- 11
205 * PIRQH ---- 12
206 *
207 * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
208 * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
209 */
210 pci_write_config_dword(dev, 0x48, 0xb9317542);
211
212 /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
213 pci_write_config_byte(dev, 0x86, 0x0c);
214
215 /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
216 pci_write_config_byte(dev, 0x87, 0x0d);
217
218 /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
219 pci_write_config_byte(dev, 0x88, 0x0f);
220
221 /* USB 2.0 controller, interrupt: PIRQ7 */
222 pci_write_config_byte(dev, 0x74, 0x06);
223
224 /* Audio controller, interrupt: PIRQE */
225 pci_write_config_byte(dev, 0x8a, 0x0c);
226
227 /* Modem controller, interrupt: PIRQF */
228 pci_write_config_byte(dev, 0x8b, 0x0d);
229
230 /* HD audio controller, interrupt: PIRQG */
231 pci_write_config_byte(dev, 0x8c, 0x0e);
232
233 /* Serial ATA interrupt: PIRQD */
234 pci_write_config_byte(dev, 0x8d, 0x0b);
235
236 /* SMB interrupt: PIRQH */
237 pci_write_config_byte(dev, 0x8e, 0x0f);
238
239 /* PMU ACPI SCI interrupt: PIRQH */
240 pci_write_config_byte(dev, 0x8f, 0x0f);
241
242 /* Primary PATA IDE IRQ: 14
243 * Secondary PATA IDE IRQ: 15
244 */
245 pci_write_config_byte(dev, 0x44, 0x3d);
246 pci_write_config_byte(dev, 0x75, 0x0f);
247
248 /* Set IRQ14 and IRQ15 to legacy IRQs */
249 pci_read_config_word(dev, 0x46, &temp);
250 temp |= 0xc000;
251 pci_write_config_word(dev, 0x46, temp);
252
253 /* Set i8259 interrupt trigger
254 * IRQ 3: Level
255 * IRQ 4: Level
256 * IRQ 5: Level
257 * IRQ 6: Level
258 * IRQ 7: Level
259 * IRQ 9: Level
260 * IRQ 10: Level
261 * IRQ 11: Level
262 * IRQ 12: Level
263 * IRQ 14: Edge
264 * IRQ 15: Edge
265 */
266 outb(0xfa, 0x4d0);
267 outb(0x1e, 0x4d1);
268}
189 269
190int 270static void __devinit quirk_uli5288(struct pci_dev *dev)
191mpc86xx_exclude_device(u_char bus, u_char devfn)
192{ 271{
193#if !defined(CONFIG_PCI) 272 unsigned char c;
194 if (bus == 0 && PCI_SLOT(devfn) == 0) 273
195 return PCIBIOS_DEVICE_NOT_FOUND; 274 pci_read_config_byte(dev,0x83,&c);
196#endif 275 c |= 0x80;
276 pci_write_config_byte(dev, 0x83, c);
277
278 pci_write_config_byte(dev, 0x09, 0x01);
279 pci_write_config_byte(dev, 0x0a, 0x06);
280
281 pci_read_config_byte(dev,0x83,&c);
282 c &= 0x7f;
283 pci_write_config_byte(dev, 0x83, c);
197 284
198 return PCIBIOS_SUCCESSFUL; 285 pci_read_config_byte(dev,0x84,&c);
286 c |= 0x01;
287 pci_write_config_byte(dev, 0x84, c);
199} 288}
289
290static void __devinit quirk_uli5229(struct pci_dev *dev)
291{
292 unsigned short temp;
293 pci_write_config_word(dev, 0x04, 0x0405);
294 pci_read_config_word(dev, 0x4a, &temp);
295 temp |= 0x1000;
296 pci_write_config_word(dev, 0x4a, temp);
297}
298
299static void __devinit early_uli5249(struct pci_dev *dev)
300{
301 unsigned char temp;
302 pci_write_config_word(dev, 0x04, 0x0007);
303 pci_read_config_byte(dev, 0x7c, &temp);
304 pci_write_config_byte(dev, 0x7c, 0x80);
305 pci_write_config_byte(dev, 0x09, 0x01);
306 pci_write_config_byte(dev, 0x7c, temp);
307 dev->class |= 0x1;
308}
309
310DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
311DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
312DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
313DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
200#endif /* CONFIG_PCI */ 314#endif /* CONFIG_PCI */
201 315
202 316
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index 944ec4b71416..9cca3d1a67f2 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -34,8 +34,8 @@ extern unsigned long __secondary_hold_acknowledge;
34static void __init 34static void __init
35smp_86xx_release_core(int nr) 35smp_86xx_release_core(int nr)
36{ 36{
37 void *mcm_vaddr; 37 __be32 __iomem *mcm_vaddr;
38 unsigned long vaddr, pcr; 38 unsigned long pcr;
39 39
40 if (nr < 0 || nr >= NR_CPUS) 40 if (nr < 0 || nr >= NR_CPUS)
41 return; 41 return;
@@ -45,10 +45,9 @@ smp_86xx_release_core(int nr)
45 */ 45 */
46 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET, 46 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
47 MPC86xx_MCM_SIZE); 47 MPC86xx_MCM_SIZE);
48 vaddr = (unsigned long)mcm_vaddr + MCM_PORT_CONFIG_OFFSET; 48 pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
49 pcr = in_be32((volatile unsigned *)vaddr);
50 pcr |= 1 << (nr + 24); 49 pcr |= 1 << (nr + 24);
51 out_be32((volatile unsigned *)vaddr, pcr); 50 out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
52} 51}
53 52
54 53
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c
index 5180df7c75bc..0d8b34089b96 100644
--- a/arch/powerpc/platforms/86xx/pci.c
+++ b/arch/powerpc/platforms/86xx/pci.c
@@ -122,15 +122,12 @@ static void __init setup_pcie_atmu(struct pci_controller *hose, struct resource
122static void __init 122static void __init
123mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) 123mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size)
124{ 124{
125 volatile struct ccsr_pex *pcie;
126 u16 cmd; 125 u16 cmd;
127 unsigned int temps; 126 unsigned int temps;
128 127
129 DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", 128 DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n",
130 pcie_offset, pcie_size); 129 pcie_offset, pcie_size);
131 130
132 pcie = ioremap(pcie_offset, pcie_size);
133
134 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); 131 early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
135 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY 132 cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
136 | PCI_COMMAND_IO; 133 | PCI_COMMAND_IO;
@@ -144,6 +141,14 @@ mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size)
144 early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); 141 early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps);
145} 142}
146 143
144int mpc86xx_exclude_device(u_char bus, u_char devfn)
145{
146 if (bus == 0 && PCI_SLOT(devfn) == 0)
147 return PCIBIOS_DEVICE_NOT_FOUND;
148
149 return PCIBIOS_SUCCESSFUL;
150}
151
147int __init add_bridge(struct device_node *dev) 152int __init add_bridge(struct device_node *dev)
148{ 153{
149 int len; 154 int len;
@@ -198,128 +203,3 @@ int __init add_bridge(struct device_node *dev)
198 203
199 return 0; 204 return 0;
200} 205}
201
202static void __devinit quirk_ali1575(struct pci_dev *dev)
203{
204 unsigned short temp;
205
206 /*
207 * ALI1575 interrupts route table setup:
208 *
209 * IRQ pin IRQ#
210 * PIRQA ---- 3
211 * PIRQB ---- 4
212 * PIRQC ---- 5
213 * PIRQD ---- 6
214 * PIRQE ---- 9
215 * PIRQF ---- 10
216 * PIRQG ---- 11
217 * PIRQH ---- 12
218 *
219 * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
220 * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
221 */
222 pci_write_config_dword(dev, 0x48, 0xb9317542);
223
224 /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
225 pci_write_config_byte(dev, 0x86, 0x0c);
226
227 /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
228 pci_write_config_byte(dev, 0x87, 0x0d);
229
230 /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
231 pci_write_config_byte(dev, 0x88, 0x0f);
232
233 /* USB 2.0 controller, interrupt: PIRQ7 */
234 pci_write_config_byte(dev, 0x74, 0x06);
235
236 /* Audio controller, interrupt: PIRQE */
237 pci_write_config_byte(dev, 0x8a, 0x0c);
238
239 /* Modem controller, interrupt: PIRQF */
240 pci_write_config_byte(dev, 0x8b, 0x0d);
241
242 /* HD audio controller, interrupt: PIRQG */
243 pci_write_config_byte(dev, 0x8c, 0x0e);
244
245 /* Serial ATA interrupt: PIRQD */
246 pci_write_config_byte(dev, 0x8d, 0x0b);
247
248 /* SMB interrupt: PIRQH */
249 pci_write_config_byte(dev, 0x8e, 0x0f);
250
251 /* PMU ACPI SCI interrupt: PIRQH */
252 pci_write_config_byte(dev, 0x8f, 0x0f);
253
254 /* Primary PATA IDE IRQ: 14
255 * Secondary PATA IDE IRQ: 15
256 */
257 pci_write_config_byte(dev, 0x44, 0x3d);
258 pci_write_config_byte(dev, 0x75, 0x0f);
259
260 /* Set IRQ14 and IRQ15 to legacy IRQs */
261 pci_read_config_word(dev, 0x46, &temp);
262 temp |= 0xc000;
263 pci_write_config_word(dev, 0x46, temp);
264
265 /* Set i8259 interrupt trigger
266 * IRQ 3: Level
267 * IRQ 4: Level
268 * IRQ 5: Level
269 * IRQ 6: Level
270 * IRQ 7: Level
271 * IRQ 9: Level
272 * IRQ 10: Level
273 * IRQ 11: Level
274 * IRQ 12: Level
275 * IRQ 14: Edge
276 * IRQ 15: Edge
277 */
278 outb(0xfa, 0x4d0);
279 outb(0x1e, 0x4d1);
280}
281
282static void __devinit quirk_uli5288(struct pci_dev *dev)
283{
284 unsigned char c;
285
286 pci_read_config_byte(dev,0x83,&c);
287 c |= 0x80;
288 pci_write_config_byte(dev, 0x83, c);
289
290 pci_write_config_byte(dev, 0x09, 0x01);
291 pci_write_config_byte(dev, 0x0a, 0x06);
292
293 pci_read_config_byte(dev,0x83,&c);
294 c &= 0x7f;
295 pci_write_config_byte(dev, 0x83, c);
296
297 pci_read_config_byte(dev,0x84,&c);
298 c |= 0x01;
299 pci_write_config_byte(dev, 0x84, c);
300}
301
302static void __devinit quirk_uli5229(struct pci_dev *dev)
303{
304 unsigned short temp;
305 pci_write_config_word(dev, 0x04, 0x0405);
306 pci_read_config_word(dev, 0x4a, &temp);
307 temp |= 0x1000;
308 pci_write_config_word(dev, 0x4a, temp);
309}
310
311static void __devinit early_uli5249(struct pci_dev *dev)
312{
313 unsigned char temp;
314 pci_write_config_word(dev, 0x04, 0x0007);
315 pci_read_config_byte(dev, 0x7c, &temp);
316 pci_write_config_byte(dev, 0x7c, 0x80);
317 pci_write_config_byte(dev, 0x09, 0x01);
318 pci_write_config_byte(dev, 0x7c, temp);
319 dev->class |= 0x1;
320}
321
322DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
323DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
324DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
325DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);