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authorAlexander Duyck <alexander.h.duyck@redhat.com>2014-12-11 18:01:55 -0500
committerDavid S. Miller <davem@davemloft.net>2014-12-11 21:15:05 -0500
commit8a449718414ff10b9d5559ed3e8e09c7178774f2 (patch)
tree81097c0d6949fb90e40176ddff1f4be30467b576 /arch/powerpc
parentc11a9009ae6a8c42a8cd69d885601e1aa6fbea04 (diff)
arch: Cleanup read_barrier_depends() and comments
This patch is meant to cleanup the handling of read_barrier_depends and smp_read_barrier_depends. In multiple spots in the kernel headers read_barrier_depends is defined as "do {} while (0)", however we then go into the SMP vs non-SMP sections and have the SMP version reference read_barrier_depends, and the non-SMP define it as yet another empty do/while. With this commit I went through and cleaned out the duplicate definitions and reduced the number of definitions down to 2 per header. In addition I moved the 50 line comments for the macro from the x86 and mips headers that defined it as an empty do/while to those that were actually defining the macro, alpha and blackfin. Signed-off-by: Alexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/barrier.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
index bab79a110c7b..cb6d66c6e3e1 100644
--- a/arch/powerpc/include/asm/barrier.h
+++ b/arch/powerpc/include/asm/barrier.h
@@ -33,7 +33,6 @@
33#define mb() __asm__ __volatile__ ("sync" : : : "memory") 33#define mb() __asm__ __volatile__ ("sync" : : : "memory")
34#define rmb() __asm__ __volatile__ ("sync" : : : "memory") 34#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
35#define wmb() __asm__ __volatile__ ("sync" : : : "memory") 35#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
36#define read_barrier_depends() do { } while(0)
37 36
38#define set_mb(var, value) do { var = value; mb(); } while (0) 37#define set_mb(var, value) do { var = value; mb(); } while (0)
39 38
@@ -50,16 +49,17 @@
50#define smp_mb() mb() 49#define smp_mb() mb()
51#define smp_rmb() __lwsync() 50#define smp_rmb() __lwsync()
52#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory") 51#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
53#define smp_read_barrier_depends() read_barrier_depends()
54#else 52#else
55#define __lwsync() barrier() 53#define __lwsync() barrier()
56 54
57#define smp_mb() barrier() 55#define smp_mb() barrier()
58#define smp_rmb() barrier() 56#define smp_rmb() barrier()
59#define smp_wmb() barrier() 57#define smp_wmb() barrier()
60#define smp_read_barrier_depends() do { } while(0)
61#endif /* CONFIG_SMP */ 58#endif /* CONFIG_SMP */
62 59
60#define read_barrier_depends() do { } while (0)
61#define smp_read_barrier_depends() do { } while (0)
62
63/* 63/*
64 * This is a barrier which prevents following instructions from being 64 * This is a barrier which prevents following instructions from being
65 * started until the value of the argument x is known. For example, if 65 * started until the value of the argument x is known. For example, if