diff options
author | Wang Dongsheng <dongsheng.wang@freescale.com> | 2014-03-19 23:19:37 -0400 |
---|---|---|
committer | Scott Wood <scottwood@freescale.com> | 2014-03-19 23:37:44 -0400 |
commit | 48b16180d0d91324e5d2423c6d53d97bbe3dcc14 (patch) | |
tree | 522da33ee1abe3f0a3ed55a337756903cb7ea74e /arch/powerpc | |
parent | 093943735718a28d45dcfcc74a737ed39e402893 (diff) |
fsl/pci: The new pci suspend/resume implementation
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state will be normal.
When we send pme turnoff message in pci controller suspend, the
links will into l2/l3 ready, then, host cannot communicate with
ep device, but pci-driver will call back EP device to save them
state. So we need to change platform_driver->suspend/resume to
syscore->suspend/resume.
So the new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume. And add a PME handler,
to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, to save EP state in
pci_pm_suspend_noirq, so we need to keep the link, until
pci_pm_suspend_noirq finish.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/platforms/85xx/c293pcie.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/corenet_generic.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/ge_imp3a.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc8536_ds.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_cds.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_ds.c | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_mds.c | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 10 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/p1010rdb.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/p1022_ds.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/p1022_rdk.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/p1023_rds.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/qemu_e500.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/sbc8548.c | 1 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/xes_mpc85xx.c | 3 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 170 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_pci.h | 8 |
17 files changed, 185 insertions, 24 deletions
diff --git a/arch/powerpc/platforms/85xx/c293pcie.c b/arch/powerpc/platforms/85xx/c293pcie.c index 213d5b815827..84476b646005 100644 --- a/arch/powerpc/platforms/85xx/c293pcie.c +++ b/arch/powerpc/platforms/85xx/c293pcie.c | |||
@@ -68,6 +68,7 @@ define_machine(c293_pcie) { | |||
68 | .init_IRQ = c293_pcie_pic_init, | 68 | .init_IRQ = c293_pcie_pic_init, |
69 | #ifdef CONFIG_PCI | 69 | #ifdef CONFIG_PCI |
70 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 70 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
71 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
71 | #endif | 72 | #endif |
72 | .get_irq = mpic_get_irq, | 73 | .get_irq = mpic_get_irq, |
73 | .restart = fsl_rstcr_restart, | 74 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c index a8877c4e10ad..8e4b1e1a4911 100644 --- a/arch/powerpc/platforms/85xx/corenet_generic.c +++ b/arch/powerpc/platforms/85xx/corenet_generic.c | |||
@@ -179,6 +179,7 @@ define_machine(corenet_generic) { | |||
179 | .init_IRQ = corenet_gen_pic_init, | 179 | .init_IRQ = corenet_gen_pic_init, |
180 | #ifdef CONFIG_PCI | 180 | #ifdef CONFIG_PCI |
181 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 181 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
182 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
182 | #endif | 183 | #endif |
183 | .get_irq = mpic_get_coreint_irq, | 184 | .get_irq = mpic_get_coreint_irq, |
184 | .restart = fsl_rstcr_restart, | 185 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c index e6285ae6f423..11790e074c8a 100644 --- a/arch/powerpc/platforms/85xx/ge_imp3a.c +++ b/arch/powerpc/platforms/85xx/ge_imp3a.c | |||
@@ -215,6 +215,7 @@ define_machine(ge_imp3a) { | |||
215 | .show_cpuinfo = ge_imp3a_show_cpuinfo, | 215 | .show_cpuinfo = ge_imp3a_show_cpuinfo, |
216 | #ifdef CONFIG_PCI | 216 | #ifdef CONFIG_PCI |
217 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 217 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
218 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
218 | #endif | 219 | #endif |
219 | .get_irq = mpic_get_irq, | 220 | .get_irq = mpic_get_irq, |
220 | .restart = fsl_rstcr_restart, | 221 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index 15ce4b55f117..a378ba3519e9 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c | |||
@@ -76,6 +76,7 @@ define_machine(mpc8536_ds) { | |||
76 | .init_IRQ = mpc8536_ds_pic_init, | 76 | .init_IRQ = mpc8536_ds_pic_init, |
77 | #ifdef CONFIG_PCI | 77 | #ifdef CONFIG_PCI |
78 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 78 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
79 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
79 | #endif | 80 | #endif |
80 | .get_irq = mpic_get_irq, | 81 | .get_irq = mpic_get_irq, |
81 | .restart = fsl_rstcr_restart, | 82 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 7a31a0e1df29..b0753e222086 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c | |||
@@ -385,6 +385,7 @@ define_machine(mpc85xx_cds) { | |||
385 | #ifdef CONFIG_PCI | 385 | #ifdef CONFIG_PCI |
386 | .restart = mpc85xx_cds_restart, | 386 | .restart = mpc85xx_cds_restart, |
387 | .pcibios_fixup_bus = mpc85xx_cds_fixup_bus, | 387 | .pcibios_fixup_bus = mpc85xx_cds_fixup_bus, |
388 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
388 | #else | 389 | #else |
389 | .restart = fsl_rstcr_restart, | 390 | .restart = fsl_rstcr_restart, |
390 | #endif | 391 | #endif |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 9ebb91ed96a3..ffdf02121a7c 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
@@ -209,6 +209,7 @@ define_machine(mpc8544_ds) { | |||
209 | .init_IRQ = mpc85xx_ds_pic_init, | 209 | .init_IRQ = mpc85xx_ds_pic_init, |
210 | #ifdef CONFIG_PCI | 210 | #ifdef CONFIG_PCI |
211 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 211 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
212 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
212 | #endif | 213 | #endif |
213 | .get_irq = mpic_get_irq, | 214 | .get_irq = mpic_get_irq, |
214 | .restart = fsl_rstcr_restart, | 215 | .restart = fsl_rstcr_restart, |
@@ -223,6 +224,7 @@ define_machine(mpc8572_ds) { | |||
223 | .init_IRQ = mpc85xx_ds_pic_init, | 224 | .init_IRQ = mpc85xx_ds_pic_init, |
224 | #ifdef CONFIG_PCI | 225 | #ifdef CONFIG_PCI |
225 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 226 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
227 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
226 | #endif | 228 | #endif |
227 | .get_irq = mpic_get_irq, | 229 | .get_irq = mpic_get_irq, |
228 | .restart = fsl_rstcr_restart, | 230 | .restart = fsl_rstcr_restart, |
@@ -237,6 +239,7 @@ define_machine(p2020_ds) { | |||
237 | .init_IRQ = mpc85xx_ds_pic_init, | 239 | .init_IRQ = mpc85xx_ds_pic_init, |
238 | #ifdef CONFIG_PCI | 240 | #ifdef CONFIG_PCI |
239 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 241 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
242 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
240 | #endif | 243 | #endif |
241 | .get_irq = mpic_get_irq, | 244 | .get_irq = mpic_get_irq, |
242 | .restart = fsl_rstcr_restart, | 245 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 3c190b467460..a392e94a07fa 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -392,6 +392,7 @@ define_machine(mpc8568_mds) { | |||
392 | .progress = udbg_progress, | 392 | .progress = udbg_progress, |
393 | #ifdef CONFIG_PCI | 393 | #ifdef CONFIG_PCI |
394 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 394 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
395 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
395 | #endif | 396 | #endif |
396 | }; | 397 | }; |
397 | 398 | ||
@@ -413,6 +414,7 @@ define_machine(mpc8569_mds) { | |||
413 | .progress = udbg_progress, | 414 | .progress = udbg_progress, |
414 | #ifdef CONFIG_PCI | 415 | #ifdef CONFIG_PCI |
415 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 416 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
417 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
416 | #endif | 418 | #endif |
417 | }; | 419 | }; |
418 | 420 | ||
@@ -435,6 +437,7 @@ define_machine(p1021_mds) { | |||
435 | .progress = udbg_progress, | 437 | .progress = udbg_progress, |
436 | #ifdef CONFIG_PCI | 438 | #ifdef CONFIG_PCI |
437 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 439 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
440 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
438 | #endif | 441 | #endif |
439 | }; | 442 | }; |
440 | 443 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index 294b179b3584..e358bed66d01 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c | |||
@@ -231,6 +231,7 @@ define_machine(p2020_rdb) { | |||
231 | .init_IRQ = mpc85xx_rdb_pic_init, | 231 | .init_IRQ = mpc85xx_rdb_pic_init, |
232 | #ifdef CONFIG_PCI | 232 | #ifdef CONFIG_PCI |
233 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 233 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
234 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
234 | #endif | 235 | #endif |
235 | .get_irq = mpic_get_irq, | 236 | .get_irq = mpic_get_irq, |
236 | .restart = fsl_rstcr_restart, | 237 | .restart = fsl_rstcr_restart, |
@@ -245,6 +246,7 @@ define_machine(p1020_rdb) { | |||
245 | .init_IRQ = mpc85xx_rdb_pic_init, | 246 | .init_IRQ = mpc85xx_rdb_pic_init, |
246 | #ifdef CONFIG_PCI | 247 | #ifdef CONFIG_PCI |
247 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 248 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
249 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
248 | #endif | 250 | #endif |
249 | .get_irq = mpic_get_irq, | 251 | .get_irq = mpic_get_irq, |
250 | .restart = fsl_rstcr_restart, | 252 | .restart = fsl_rstcr_restart, |
@@ -259,6 +261,7 @@ define_machine(p1021_rdb_pc) { | |||
259 | .init_IRQ = mpc85xx_rdb_pic_init, | 261 | .init_IRQ = mpc85xx_rdb_pic_init, |
260 | #ifdef CONFIG_PCI | 262 | #ifdef CONFIG_PCI |
261 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 263 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
264 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
262 | #endif | 265 | #endif |
263 | .get_irq = mpic_get_irq, | 266 | .get_irq = mpic_get_irq, |
264 | .restart = fsl_rstcr_restart, | 267 | .restart = fsl_rstcr_restart, |
@@ -273,6 +276,7 @@ define_machine(p2020_rdb_pc) { | |||
273 | .init_IRQ = mpc85xx_rdb_pic_init, | 276 | .init_IRQ = mpc85xx_rdb_pic_init, |
274 | #ifdef CONFIG_PCI | 277 | #ifdef CONFIG_PCI |
275 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 278 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
279 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
276 | #endif | 280 | #endif |
277 | .get_irq = mpic_get_irq, | 281 | .get_irq = mpic_get_irq, |
278 | .restart = fsl_rstcr_restart, | 282 | .restart = fsl_rstcr_restart, |
@@ -287,6 +291,7 @@ define_machine(p1025_rdb) { | |||
287 | .init_IRQ = mpc85xx_rdb_pic_init, | 291 | .init_IRQ = mpc85xx_rdb_pic_init, |
288 | #ifdef CONFIG_PCI | 292 | #ifdef CONFIG_PCI |
289 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 293 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
294 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
290 | #endif | 295 | #endif |
291 | .get_irq = mpic_get_irq, | 296 | .get_irq = mpic_get_irq, |
292 | .restart = fsl_rstcr_restart, | 297 | .restart = fsl_rstcr_restart, |
@@ -301,6 +306,7 @@ define_machine(p1020_mbg_pc) { | |||
301 | .init_IRQ = mpc85xx_rdb_pic_init, | 306 | .init_IRQ = mpc85xx_rdb_pic_init, |
302 | #ifdef CONFIG_PCI | 307 | #ifdef CONFIG_PCI |
303 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 308 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
309 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
304 | #endif | 310 | #endif |
305 | .get_irq = mpic_get_irq, | 311 | .get_irq = mpic_get_irq, |
306 | .restart = fsl_rstcr_restart, | 312 | .restart = fsl_rstcr_restart, |
@@ -315,6 +321,7 @@ define_machine(p1020_utm_pc) { | |||
315 | .init_IRQ = mpc85xx_rdb_pic_init, | 321 | .init_IRQ = mpc85xx_rdb_pic_init, |
316 | #ifdef CONFIG_PCI | 322 | #ifdef CONFIG_PCI |
317 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 323 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
324 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
318 | #endif | 325 | #endif |
319 | .get_irq = mpic_get_irq, | 326 | .get_irq = mpic_get_irq, |
320 | .restart = fsl_rstcr_restart, | 327 | .restart = fsl_rstcr_restart, |
@@ -329,6 +336,7 @@ define_machine(p1020_rdb_pc) { | |||
329 | .init_IRQ = mpc85xx_rdb_pic_init, | 336 | .init_IRQ = mpc85xx_rdb_pic_init, |
330 | #ifdef CONFIG_PCI | 337 | #ifdef CONFIG_PCI |
331 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 338 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
339 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
332 | #endif | 340 | #endif |
333 | .get_irq = mpic_get_irq, | 341 | .get_irq = mpic_get_irq, |
334 | .restart = fsl_rstcr_restart, | 342 | .restart = fsl_rstcr_restart, |
@@ -343,6 +351,7 @@ define_machine(p1020_rdb_pd) { | |||
343 | .init_IRQ = mpc85xx_rdb_pic_init, | 351 | .init_IRQ = mpc85xx_rdb_pic_init, |
344 | #ifdef CONFIG_PCI | 352 | #ifdef CONFIG_PCI |
345 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 353 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
354 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
346 | #endif | 355 | #endif |
347 | .get_irq = mpic_get_irq, | 356 | .get_irq = mpic_get_irq, |
348 | .restart = fsl_rstcr_restart, | 357 | .restart = fsl_rstcr_restart, |
@@ -357,6 +366,7 @@ define_machine(p1024_rdb) { | |||
357 | .init_IRQ = mpc85xx_rdb_pic_init, | 366 | .init_IRQ = mpc85xx_rdb_pic_init, |
358 | #ifdef CONFIG_PCI | 367 | #ifdef CONFIG_PCI |
359 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 368 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
369 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
360 | #endif | 370 | #endif |
361 | .get_irq = mpic_get_irq, | 371 | .get_irq = mpic_get_irq, |
362 | .restart = fsl_rstcr_restart, | 372 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c index d6a3dd311494..ad1a3d438a9e 100644 --- a/arch/powerpc/platforms/85xx/p1010rdb.c +++ b/arch/powerpc/platforms/85xx/p1010rdb.c | |||
@@ -78,6 +78,7 @@ define_machine(p1010_rdb) { | |||
78 | .init_IRQ = p1010_rdb_pic_init, | 78 | .init_IRQ = p1010_rdb_pic_init, |
79 | #ifdef CONFIG_PCI | 79 | #ifdef CONFIG_PCI |
80 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 80 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
81 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
81 | #endif | 82 | #endif |
82 | .get_irq = mpic_get_irq, | 83 | .get_irq = mpic_get_irq, |
83 | .restart = fsl_rstcr_restart, | 84 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c index e611e79f23ce..6ac986d3f8a3 100644 --- a/arch/powerpc/platforms/85xx/p1022_ds.c +++ b/arch/powerpc/platforms/85xx/p1022_ds.c | |||
@@ -567,6 +567,7 @@ define_machine(p1022_ds) { | |||
567 | .init_IRQ = p1022_ds_pic_init, | 567 | .init_IRQ = p1022_ds_pic_init, |
568 | #ifdef CONFIG_PCI | 568 | #ifdef CONFIG_PCI |
569 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 569 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
570 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
570 | #endif | 571 | #endif |
571 | .get_irq = mpic_get_irq, | 572 | .get_irq = mpic_get_irq, |
572 | .restart = fsl_rstcr_restart, | 573 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c index 8c9297112b30..7a180f0308d5 100644 --- a/arch/powerpc/platforms/85xx/p1022_rdk.c +++ b/arch/powerpc/platforms/85xx/p1022_rdk.c | |||
@@ -147,6 +147,7 @@ define_machine(p1022_rdk) { | |||
147 | .init_IRQ = p1022_rdk_pic_init, | 147 | .init_IRQ = p1022_rdk_pic_init, |
148 | #ifdef CONFIG_PCI | 148 | #ifdef CONFIG_PCI |
149 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 149 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
150 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
150 | #endif | 151 | #endif |
151 | .get_irq = mpic_get_irq, | 152 | .get_irq = mpic_get_irq, |
152 | .restart = fsl_rstcr_restart, | 153 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c index 2ae9d490c3d9..0e614007acfb 100644 --- a/arch/powerpc/platforms/85xx/p1023_rds.c +++ b/arch/powerpc/platforms/85xx/p1023_rds.c | |||
@@ -126,6 +126,7 @@ define_machine(p1023_rds) { | |||
126 | .progress = udbg_progress, | 126 | .progress = udbg_progress, |
127 | #ifdef CONFIG_PCI | 127 | #ifdef CONFIG_PCI |
128 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 128 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
129 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
129 | #endif | 130 | #endif |
130 | }; | 131 | }; |
131 | 132 | ||
@@ -140,5 +141,6 @@ define_machine(p1023_rdb) { | |||
140 | .progress = udbg_progress, | 141 | .progress = udbg_progress, |
141 | #ifdef CONFIG_PCI | 142 | #ifdef CONFIG_PCI |
142 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 143 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
144 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
143 | #endif | 145 | #endif |
144 | }; | 146 | }; |
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c index 5cefc5a9a144..7f2673293549 100644 --- a/arch/powerpc/platforms/85xx/qemu_e500.c +++ b/arch/powerpc/platforms/85xx/qemu_e500.c | |||
@@ -66,6 +66,7 @@ define_machine(qemu_e500) { | |||
66 | .init_IRQ = qemu_e500_pic_init, | 66 | .init_IRQ = qemu_e500_pic_init, |
67 | #ifdef CONFIG_PCI | 67 | #ifdef CONFIG_PCI |
68 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 68 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
69 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
69 | #endif | 70 | #endif |
70 | .get_irq = mpic_get_coreint_irq, | 71 | .get_irq = mpic_get_coreint_irq, |
71 | .restart = fsl_rstcr_restart, | 72 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c index f62121825914..b07214666d65 100644 --- a/arch/powerpc/platforms/85xx/sbc8548.c +++ b/arch/powerpc/platforms/85xx/sbc8548.c | |||
@@ -135,6 +135,7 @@ define_machine(sbc8548) { | |||
135 | .restart = fsl_rstcr_restart, | 135 | .restart = fsl_rstcr_restart, |
136 | #ifdef CONFIG_PCI | 136 | #ifdef CONFIG_PCI |
137 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 137 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
138 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
138 | #endif | 139 | #endif |
139 | .calibrate_decr = generic_calibrate_decr, | 140 | .calibrate_decr = generic_calibrate_decr, |
140 | .progress = udbg_progress, | 141 | .progress = udbg_progress, |
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c index dcbf7e42dce7..1a9c1085855f 100644 --- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c | |||
@@ -170,6 +170,7 @@ define_machine(xes_mpc8572) { | |||
170 | .init_IRQ = xes_mpc85xx_pic_init, | 170 | .init_IRQ = xes_mpc85xx_pic_init, |
171 | #ifdef CONFIG_PCI | 171 | #ifdef CONFIG_PCI |
172 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 172 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
173 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
173 | #endif | 174 | #endif |
174 | .get_irq = mpic_get_irq, | 175 | .get_irq = mpic_get_irq, |
175 | .restart = fsl_rstcr_restart, | 176 | .restart = fsl_rstcr_restart, |
@@ -184,6 +185,7 @@ define_machine(xes_mpc8548) { | |||
184 | .init_IRQ = xes_mpc85xx_pic_init, | 185 | .init_IRQ = xes_mpc85xx_pic_init, |
185 | #ifdef CONFIG_PCI | 186 | #ifdef CONFIG_PCI |
186 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 187 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
188 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
187 | #endif | 189 | #endif |
188 | .get_irq = mpic_get_irq, | 190 | .get_irq = mpic_get_irq, |
189 | .restart = fsl_rstcr_restart, | 191 | .restart = fsl_rstcr_restart, |
@@ -198,6 +200,7 @@ define_machine(xes_mpc8540) { | |||
198 | .init_IRQ = xes_mpc85xx_pic_init, | 200 | .init_IRQ = xes_mpc85xx_pic_init, |
199 | #ifdef CONFIG_PCI | 201 | #ifdef CONFIG_PCI |
200 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | 202 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
203 | .pcibios_fixup_phb = fsl_pcibios_fixup_phb, | ||
201 | #endif | 204 | #endif |
202 | .get_irq = mpic_get_irq, | 205 | .get_irq = mpic_get_irq, |
203 | .restart = fsl_rstcr_restart, | 206 | .restart = fsl_rstcr_restart, |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 8cdd34482575..3f415e252ea5 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -22,10 +22,13 @@ | |||
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/string.h> | 23 | #include <linux/string.h> |
24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
25 | #include <linux/interrupt.h> | ||
25 | #include <linux/bootmem.h> | 26 | #include <linux/bootmem.h> |
26 | #include <linux/memblock.h> | 27 | #include <linux/memblock.h> |
27 | #include <linux/log2.h> | 28 | #include <linux/log2.h> |
28 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
30 | #include <linux/suspend.h> | ||
31 | #include <linux/syscore_ops.h> | ||
29 | #include <linux/uaccess.h> | 32 | #include <linux/uaccess.h> |
30 | 33 | ||
31 | #include <asm/io.h> | 34 | #include <asm/io.h> |
@@ -1094,55 +1097,171 @@ void fsl_pci_assign_primary(void) | |||
1094 | } | 1097 | } |
1095 | } | 1098 | } |
1096 | 1099 | ||
1097 | static int fsl_pci_probe(struct platform_device *pdev) | 1100 | #ifdef CONFIG_PM_SLEEP |
1101 | static irqreturn_t fsl_pci_pme_handle(int irq, void *dev_id) | ||
1098 | { | 1102 | { |
1099 | int ret; | 1103 | struct pci_controller *hose = dev_id; |
1100 | struct device_node *node; | 1104 | struct ccsr_pci __iomem *pci = hose->private_data; |
1105 | u32 dr; | ||
1101 | 1106 | ||
1102 | node = pdev->dev.of_node; | 1107 | dr = in_be32(&pci->pex_pme_mes_dr); |
1103 | ret = fsl_add_bridge(pdev, fsl_pci_primary == node); | 1108 | if (!dr) |
1109 | return IRQ_NONE; | ||
1104 | 1110 | ||
1105 | mpc85xx_pci_err_probe(pdev); | 1111 | out_be32(&pci->pex_pme_mes_dr, dr); |
1106 | 1112 | ||
1107 | return 0; | 1113 | return IRQ_HANDLED; |
1108 | } | 1114 | } |
1109 | 1115 | ||
1110 | #ifdef CONFIG_PM | 1116 | static int fsl_pci_pme_probe(struct pci_controller *hose) |
1111 | static int fsl_pci_resume(struct device *dev) | ||
1112 | { | 1117 | { |
1113 | struct pci_controller *hose; | 1118 | struct ccsr_pci __iomem *pci; |
1114 | struct resource pci_rsrc; | 1119 | struct pci_dev *dev; |
1120 | int pme_irq; | ||
1121 | int res; | ||
1122 | u16 pms; | ||
1115 | 1123 | ||
1116 | hose = pci_find_hose_for_OF_device(dev->of_node); | 1124 | /* Get hose's pci_dev */ |
1117 | if (!hose) | 1125 | dev = list_first_entry(&hose->bus->devices, typeof(*dev), bus_list); |
1118 | return -ENODEV; | 1126 | |
1127 | /* PME Disable */ | ||
1128 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pms); | ||
1129 | pms &= ~PCI_PM_CTRL_PME_ENABLE; | ||
1130 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pms); | ||
1131 | |||
1132 | pme_irq = irq_of_parse_and_map(hose->dn, 0); | ||
1133 | if (!pme_irq) { | ||
1134 | dev_err(&dev->dev, "Failed to map PME interrupt.\n"); | ||
1135 | |||
1136 | return -ENXIO; | ||
1137 | } | ||
1138 | |||
1139 | res = devm_request_irq(hose->parent, pme_irq, | ||
1140 | fsl_pci_pme_handle, | ||
1141 | IRQF_SHARED, | ||
1142 | "[PCI] PME", hose); | ||
1143 | if (res < 0) { | ||
1144 | dev_err(&dev->dev, "Unable to requiest irq %d for PME\n", pme_irq); | ||
1145 | irq_dispose_mapping(pme_irq); | ||
1119 | 1146 | ||
1120 | if (of_address_to_resource(dev->of_node, 0, &pci_rsrc)) { | ||
1121 | dev_err(dev, "Get pci register base failed."); | ||
1122 | return -ENODEV; | 1147 | return -ENODEV; |
1123 | } | 1148 | } |
1124 | 1149 | ||
1125 | setup_pci_atmu(hose); | 1150 | pci = hose->private_data; |
1151 | |||
1152 | /* Enable PTOD, ENL23D & EXL23D */ | ||
1153 | out_be32(&pci->pex_pme_mes_disr, 0); | ||
1154 | setbits32(&pci->pex_pme_mes_disr, | ||
1155 | PME_DISR_EN_PTOD | PME_DISR_EN_ENL23D | PME_DISR_EN_EXL23D); | ||
1156 | |||
1157 | out_be32(&pci->pex_pme_mes_ier, 0); | ||
1158 | setbits32(&pci->pex_pme_mes_ier, | ||
1159 | PME_DISR_EN_PTOD | PME_DISR_EN_ENL23D | PME_DISR_EN_EXL23D); | ||
1160 | |||
1161 | /* PME Enable */ | ||
1162 | pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pms); | ||
1163 | pms |= PCI_PM_CTRL_PME_ENABLE; | ||
1164 | pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pms); | ||
1126 | 1165 | ||
1127 | return 0; | 1166 | return 0; |
1128 | } | 1167 | } |
1129 | 1168 | ||
1130 | static const struct dev_pm_ops pci_pm_ops = { | 1169 | static void send_pme_turnoff_message(struct pci_controller *hose) |
1131 | .resume = fsl_pci_resume, | 1170 | { |
1132 | }; | 1171 | struct ccsr_pci __iomem *pci = hose->private_data; |
1172 | u32 dr; | ||
1173 | int i; | ||
1133 | 1174 | ||
1134 | #define PCI_PM_OPS (&pci_pm_ops) | 1175 | /* Send PME_Turn_Off Message Request */ |
1176 | setbits32(&pci->pex_pmcr, PEX_PMCR_PTOMR); | ||
1135 | 1177 | ||
1136 | #else | 1178 | /* Wait trun off done */ |
1179 | for (i = 0; i < 150; i++) { | ||
1180 | dr = in_be32(&pci->pex_pme_mes_dr); | ||
1181 | if (dr) { | ||
1182 | out_be32(&pci->pex_pme_mes_dr, dr); | ||
1183 | break; | ||
1184 | } | ||
1137 | 1185 | ||
1138 | #define PCI_PM_OPS NULL | 1186 | udelay(1000); |
1187 | } | ||
1188 | } | ||
1139 | 1189 | ||
1190 | static void fsl_pci_syscore_do_suspend(struct pci_controller *hose) | ||
1191 | { | ||
1192 | send_pme_turnoff_message(hose); | ||
1193 | } | ||
1194 | |||
1195 | static int fsl_pci_syscore_suspend(void) | ||
1196 | { | ||
1197 | struct pci_controller *hose, *tmp; | ||
1198 | |||
1199 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) | ||
1200 | fsl_pci_syscore_do_suspend(hose); | ||
1201 | |||
1202 | return 0; | ||
1203 | } | ||
1204 | |||
1205 | static void fsl_pci_syscore_do_resume(struct pci_controller *hose) | ||
1206 | { | ||
1207 | struct ccsr_pci __iomem *pci = hose->private_data; | ||
1208 | u32 dr; | ||
1209 | int i; | ||
1210 | |||
1211 | /* Send Exit L2 State Message */ | ||
1212 | setbits32(&pci->pex_pmcr, PEX_PMCR_EXL2S); | ||
1213 | |||
1214 | /* Wait exit done */ | ||
1215 | for (i = 0; i < 150; i++) { | ||
1216 | dr = in_be32(&pci->pex_pme_mes_dr); | ||
1217 | if (dr) { | ||
1218 | out_be32(&pci->pex_pme_mes_dr, dr); | ||
1219 | break; | ||
1220 | } | ||
1221 | |||
1222 | udelay(1000); | ||
1223 | } | ||
1224 | |||
1225 | setup_pci_atmu(hose); | ||
1226 | } | ||
1227 | |||
1228 | static void fsl_pci_syscore_resume(void) | ||
1229 | { | ||
1230 | struct pci_controller *hose, *tmp; | ||
1231 | |||
1232 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) | ||
1233 | fsl_pci_syscore_do_resume(hose); | ||
1234 | } | ||
1235 | |||
1236 | static struct syscore_ops pci_syscore_pm_ops = { | ||
1237 | .suspend = fsl_pci_syscore_suspend, | ||
1238 | .resume = fsl_pci_syscore_resume, | ||
1239 | }; | ||
1140 | #endif | 1240 | #endif |
1141 | 1241 | ||
1242 | void fsl_pcibios_fixup_phb(struct pci_controller *phb) | ||
1243 | { | ||
1244 | #ifdef CONFIG_PM_SLEEP | ||
1245 | fsl_pci_pme_probe(phb); | ||
1246 | #endif | ||
1247 | } | ||
1248 | |||
1249 | static int fsl_pci_probe(struct platform_device *pdev) | ||
1250 | { | ||
1251 | struct device_node *node; | ||
1252 | int ret; | ||
1253 | |||
1254 | node = pdev->dev.of_node; | ||
1255 | ret = fsl_add_bridge(pdev, fsl_pci_primary == node); | ||
1256 | |||
1257 | mpc85xx_pci_err_probe(pdev); | ||
1258 | |||
1259 | return 0; | ||
1260 | } | ||
1261 | |||
1142 | static struct platform_driver fsl_pci_driver = { | 1262 | static struct platform_driver fsl_pci_driver = { |
1143 | .driver = { | 1263 | .driver = { |
1144 | .name = "fsl-pci", | 1264 | .name = "fsl-pci", |
1145 | .pm = PCI_PM_OPS, | ||
1146 | .of_match_table = pci_ids, | 1265 | .of_match_table = pci_ids, |
1147 | }, | 1266 | }, |
1148 | .probe = fsl_pci_probe, | 1267 | .probe = fsl_pci_probe, |
@@ -1150,6 +1269,9 @@ static struct platform_driver fsl_pci_driver = { | |||
1150 | 1269 | ||
1151 | static int __init fsl_pci_init(void) | 1270 | static int __init fsl_pci_init(void) |
1152 | { | 1271 | { |
1272 | #ifdef CONFIG_PM_SLEEP | ||
1273 | register_syscore_ops(&pci_syscore_pm_ops); | ||
1274 | #endif | ||
1153 | return platform_driver_register(&fsl_pci_driver); | 1275 | return platform_driver_register(&fsl_pci_driver); |
1154 | } | 1276 | } |
1155 | arch_initcall(fsl_pci_init); | 1277 | arch_initcall(fsl_pci_init); |
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index 8d455df58471..c1cec771d5ea 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h | |||
@@ -32,6 +32,13 @@ struct platform_device; | |||
32 | #define PIWAR_WRITE_SNOOP 0x00005000 | 32 | #define PIWAR_WRITE_SNOOP 0x00005000 |
33 | #define PIWAR_SZ_MASK 0x0000003f | 33 | #define PIWAR_SZ_MASK 0x0000003f |
34 | 34 | ||
35 | #define PEX_PMCR_PTOMR 0x1 | ||
36 | #define PEX_PMCR_EXL2S 0x2 | ||
37 | |||
38 | #define PME_DISR_EN_PTOD 0x00008000 | ||
39 | #define PME_DISR_EN_ENL23D 0x00002000 | ||
40 | #define PME_DISR_EN_EXL23D 0x00001000 | ||
41 | |||
35 | /* PCI/PCI Express outbound window reg */ | 42 | /* PCI/PCI Express outbound window reg */ |
36 | struct pci_outbound_window_regs { | 43 | struct pci_outbound_window_regs { |
37 | __be32 potar; /* 0x.0 - Outbound translation address register */ | 44 | __be32 potar; /* 0x.0 - Outbound translation address register */ |
@@ -111,6 +118,7 @@ struct ccsr_pci { | |||
111 | 118 | ||
112 | extern int fsl_add_bridge(struct platform_device *pdev, int is_primary); | 119 | extern int fsl_add_bridge(struct platform_device *pdev, int is_primary); |
113 | extern void fsl_pcibios_fixup_bus(struct pci_bus *bus); | 120 | extern void fsl_pcibios_fixup_bus(struct pci_bus *bus); |
121 | extern void fsl_pcibios_fixup_phb(struct pci_controller *phb); | ||
114 | extern int mpc83xx_add_bridge(struct device_node *dev); | 122 | extern int mpc83xx_add_bridge(struct device_node *dev); |
115 | u64 fsl_pci_immrbar_base(struct pci_controller *hose); | 123 | u64 fsl_pci_immrbar_base(struct pci_controller *hose); |
116 | 124 | ||